Commit cc922722 authored by Masanari Iida's avatar Masanari Iida Committed by Greg Kroah-Hartman

staging: crystalhd: Fix typo in crystalhd

Correct spelling typo.
Signed-off-by: default avatarMasanari Iida <standby24x7@gmail.com>
Acked-by: default avatarRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent ae7d27c0
...@@ -229,7 +229,7 @@ enum BC_DRV_CMD { ...@@ -229,7 +229,7 @@ enum BC_DRV_CMD {
DRV_CMD_REG_RD, /* Read Device Register */ DRV_CMD_REG_RD, /* Read Device Register */
DRV_CMD_REG_WR, /* Write Device Register */ DRV_CMD_REG_WR, /* Write Device Register */
DRV_CMD_FPGA_RD, /* Read FPGA Register */ DRV_CMD_FPGA_RD, /* Read FPGA Register */
DRV_CMD_FPGA_WR, /* Wrtie FPGA Reister */ DRV_CMD_FPGA_WR, /* Write FPGA Register */
DRV_CMD_MEM_RD, /* Read Device Memory */ DRV_CMD_MEM_RD, /* Read Device Memory */
DRV_CMD_MEM_WR, /* Write Device Memory */ DRV_CMD_MEM_WR, /* Write Device Memory */
DRV_CMD_RD_PCI_CFG, /* Read PCI Config Space */ DRV_CMD_RD_PCI_CFG, /* Read PCI Config Space */
......
...@@ -798,7 +798,7 @@ static const struct crystalhd_cmd_tbl g_crystalhd_cproc_tbl[] = { ...@@ -798,7 +798,7 @@ static const struct crystalhd_cmd_tbl g_crystalhd_cproc_tbl[] = {
* *
* Current gstreamer frame work does not provide any power management * Current gstreamer frame work does not provide any power management
* related notification to user mode decoder plug-in. As a work-around * related notification to user mode decoder plug-in. As a work-around
* we pass on the power mangement notification to our plug-in by completing * we pass on the power management notification to our plug-in by completing
* all outstanding requests with BC_STS_IO_USER_ABORT return code. * all outstanding requests with BC_STS_IO_USER_ABORT return code.
*/ */
enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx,
......
...@@ -29,7 +29,7 @@ ...@@ -29,7 +29,7 @@
/* /*
* NOTE:: This is the main interface file between the Linux layer * NOTE:: This is the main interface file between the Linux layer
* and the harware layer. This file will use the definitions * and the hardware layer. This file will use the definitions
* from _dts_glob and dts_defs etc.. which are defined for * from _dts_glob and dts_defs etc.. which are defined for
* windows. * windows.
*/ */
......
...@@ -115,7 +115,7 @@ struct fgt_sei { ...@@ -115,7 +115,7 @@ struct fgt_sei {
unsigned char model_id; /* Model id. */ unsigned char model_id; /* Model id. */
/* +unused SE based on Thomson spec */ /* +unused SE based on Thomson spec */
unsigned char color_desc_flag; /* Separate color descrition flag. */ unsigned char color_desc_flag; /* Separate color description flag. */
unsigned char bit_depth_luma; /* Bit depth luma minus 8. */ unsigned char bit_depth_luma; /* Bit depth luma minus 8. */
unsigned char bit_depth_chroma; /* Bit depth chroma minus 8. */ unsigned char bit_depth_chroma; /* Bit depth chroma minus 8. */
unsigned char full_range_flag; /* Full range flag. */ unsigned char full_range_flag; /* Full range flag. */
......
...@@ -398,7 +398,7 @@ static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw, ...@@ -398,7 +398,7 @@ static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw,
* Call back from TX - IOQ deletion. * Call back from TX - IOQ deletion.
* *
* This routine will release the TX DMA rings allocated * This routine will release the TX DMA rings allocated
* druing setup_dma rings interface. * during setup_dma rings interface.
* *
* Memory is allocated per DMA ring basis. This is just * Memory is allocated per DMA ring basis. This is just
* a place holder to be able to create the dio queues. * a place holder to be able to create the dio queues.
......
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#define Cpu2HstMbx1 0x00100F04 #define Cpu2HstMbx1 0x00100F04
#define MbxStat1 0x00100F08 #define MbxStat1 0x00100F08
#define Stream2Host_Intr_Sts 0x00100F24 #define Stream2Host_Intr_Sts 0x00100F24
#define C011_RET_SUCCESS 0x0 /* Reutrn status of firmware command. */ #define C011_RET_SUCCESS 0x0 /* Return status of firmware command. */
/* TS input status register */ /* TS input status register */
#define TS_StreamAFIFOStatus 0x0010044C #define TS_StreamAFIFOStatus 0x0010044C
...@@ -141,7 +141,7 @@ union link_misc_perst_deco_ctrl { ...@@ -141,7 +141,7 @@ union link_misc_perst_deco_ctrl {
uint32_t reserved0:3; /* Reserved.No Effect*/ uint32_t reserved0:3; /* Reserved.No Effect*/
uint32_t stop_bcm_7412_clk:1; /* 1 ->Stops branch of uint32_t stop_bcm_7412_clk:1; /* 1 ->Stops branch of
27MHz clk used to clk BCM7412*/ 27MHz clk used to clk BCM7412*/
uint32_t reserved1:27; /* Reseved. No Effect*/ uint32_t reserved1:27; /* Reserved. No Effect*/
}; };
uint32_t whole_reg; uint32_t whole_reg;
...@@ -176,7 +176,7 @@ union link_misc_perst_decoder_ctrl { ...@@ -176,7 +176,7 @@ union link_misc_perst_decoder_ctrl {
uint32_t res0:3; /* Reserved.No Effect*/ uint32_t res0:3; /* Reserved.No Effect*/
uint32_t stop_7412_clk:1; /* 1 ->Stops branch of 27MHz uint32_t stop_7412_clk:1; /* 1 ->Stops branch of 27MHz
clk used to clk BCM7412*/ clk used to clk BCM7412*/
uint32_t res1:27; /* Reseved. No Effect */ uint32_t res1:27; /* Reserved. No Effect */
}; };
uint32_t whole_reg; uint32_t whole_reg;
......
...@@ -53,7 +53,7 @@ ...@@ -53,7 +53,7 @@
/* OS specific PCI information structure and adapter information. */ /* OS specific PCI information structure and adapter information. */
struct crystalhd_adp { struct crystalhd_adp {
/* Hardware borad/PCI specifics */ /* Hardware board/PCI specifics */
char name[32]; char name[32];
struct pci_dev *pdev; struct pci_dev *pdev;
......
...@@ -389,7 +389,7 @@ void *bc_kern_dma_alloc(struct crystalhd_adp *adp, uint32_t sz, ...@@ -389,7 +389,7 @@ void *bc_kern_dma_alloc(struct crystalhd_adp *adp, uint32_t sz,
void *temp = NULL; void *temp = NULL;
if (!adp || !sz || !phy_addr) { if (!adp || !sz || !phy_addr) {
BCMLOG_ERR("Invalide Arg..\n"); BCMLOG_ERR("Invalid Arg..\n");
return temp; return temp;
} }
...@@ -415,7 +415,7 @@ void bc_kern_dma_free(struct crystalhd_adp *adp, uint32_t sz, void *ka, ...@@ -415,7 +415,7 @@ void bc_kern_dma_free(struct crystalhd_adp *adp, uint32_t sz, void *ka,
dma_addr_t phy_addr) dma_addr_t phy_addr)
{ {
if (!adp || !ka || !sz || !phy_addr) { if (!adp || !ka || !sz || !phy_addr) {
BCMLOG_ERR("Invalide Arg..\n"); BCMLOG_ERR("Invalid Arg..\n");
return; return;
} }
......
...@@ -206,7 +206,7 @@ extern void crystalhd_show_buffer(uint32_t off, uint8_t *buff, ...@@ -206,7 +206,7 @@ extern void crystalhd_show_buffer(uint32_t off, uint8_t *buff,
enum _chd_log_levels { enum _chd_log_levels {
BCMLOG_ERROR = 0x80000000, /* Don't disable this option */ BCMLOG_ERROR = 0x80000000, /* Don't disable this option */
BCMLOG_DATA = 0x40000000, /* Data, enable by default */ BCMLOG_DATA = 0x40000000, /* Data, enable by default */
BCMLOG_SPINLOCK = 0x20000000, /* Spcial case for Spin locks*/ BCMLOG_SPINLOCK = 0x20000000, /* Special case for Spin locks*/
/* Following are allowed only in debug mode */ /* Following are allowed only in debug mode */
BCMLOG_INFO = 0x00000001, /* Generic informational */ BCMLOG_INFO = 0x00000001, /* Generic informational */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment