Commit ccba8f3a authored by Vivien Didelot's avatar Vivien Didelot Committed by David S. Miller

net: dsa: mv88e6xxx: prefix Global Prio and Tag macros

Prefix and document the remaining Global IP and IEEE Priority and Core
Tag Type registers and give them a clear 16-bit register representation.
Signed-off-by: default avatarVivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 57d1ef38
...@@ -2022,33 +2022,33 @@ static int mv88e6xxx_g1_setup(struct mv88e6xxx_chip *chip) ...@@ -2022,33 +2022,33 @@ static int mv88e6xxx_g1_setup(struct mv88e6xxx_chip *chip)
return err; return err;
/* Configure the IP ToS mapping registers. */ /* Configure the IP ToS mapping registers. */
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_0, 0x0000); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_0, 0x0000);
if (err) if (err)
return err; return err;
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_1, 0x0000); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_1, 0x0000);
if (err) if (err)
return err; return err;
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_2, 0x5555); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_2, 0x5555);
if (err) if (err)
return err; return err;
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_3, 0x5555); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_3, 0x5555);
if (err) if (err)
return err; return err;
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_4, 0xaaaa); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_4, 0xaaaa);
if (err) if (err)
return err; return err;
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_5, 0xaaaa); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_5, 0xaaaa);
if (err) if (err)
return err; return err;
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_6, 0xffff); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_6, 0xffff);
if (err) if (err)
return err; return err;
err = mv88e6xxx_g1_write(chip, GLOBAL_IP_PRI_7, 0xffff); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IP_PRI_7, 0xffff);
if (err) if (err)
return err; return err;
/* Configure the IEEE 802.1p priority mapping register. */ /* Configure the IEEE 802.1p priority mapping register. */
err = mv88e6xxx_g1_write(chip, GLOBAL_IEEE_PRI, 0xfa41); err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_IEEE_PRI, 0xfa41);
if (err) if (err)
return err; return err;
......
...@@ -146,16 +146,29 @@ ...@@ -146,16 +146,29 @@
#define MV88E6XXX_G1_ATU_MAC23 0x0e #define MV88E6XXX_G1_ATU_MAC23 0x0e
#define MV88E6XXX_G1_ATU_MAC45 0x0f #define MV88E6XXX_G1_ATU_MAC45 0x0f
#define GLOBAL_IP_PRI_0 0x10 /* Offset 0x10: IP-PRI Mapping Register 0
#define GLOBAL_IP_PRI_1 0x11 * Offset 0x11: IP-PRI Mapping Register 1
#define GLOBAL_IP_PRI_2 0x12 * Offset 0x12: IP-PRI Mapping Register 2
#define GLOBAL_IP_PRI_3 0x13 * Offset 0x13: IP-PRI Mapping Register 3
#define GLOBAL_IP_PRI_4 0x14 * Offset 0x14: IP-PRI Mapping Register 4
#define GLOBAL_IP_PRI_5 0x15 * Offset 0x15: IP-PRI Mapping Register 5
#define GLOBAL_IP_PRI_6 0x16 * Offset 0x16: IP-PRI Mapping Register 6
#define GLOBAL_IP_PRI_7 0x17 * Offset 0x17: IP-PRI Mapping Register 7
#define GLOBAL_IEEE_PRI 0x18 */
#define GLOBAL_CORE_TAG_TYPE 0x19 #define MV88E6XXX_G1_IP_PRI_0 0x10
#define MV88E6XXX_G1_IP_PRI_1 0x11
#define MV88E6XXX_G1_IP_PRI_2 0x12
#define MV88E6XXX_G1_IP_PRI_3 0x13
#define MV88E6XXX_G1_IP_PRI_4 0x14
#define MV88E6XXX_G1_IP_PRI_5 0x15
#define MV88E6XXX_G1_IP_PRI_6 0x16
#define MV88E6XXX_G1_IP_PRI_7 0x17
/* Offset 0x18: IEEE-PRI Register */
#define MV88E6XXX_G1_IEEE_PRI 0x18
/* Offset 0x19: Core Tag Type */
#define MV88E6185_G1_CORE_TAG_TYPE 0x19
/* Offset 0x1A: Monitor Control */ /* Offset 0x1A: Monitor Control */
#define MV88E6185_G1_MONITOR_CTL 0x1a #define MV88E6185_G1_MONITOR_CTL 0x1a
......
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