Commit cd4d7464 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amdgpu: unify the interface of amd_pm_funcs

put amd_pm_funcs table in struct powerplay for all
asics.
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f93f0c3a
...@@ -3498,10 +3498,7 @@ static ssize_t amdgpu_debugfs_sensor_read(struct file *f, char __user *buf, ...@@ -3498,10 +3498,7 @@ static ssize_t amdgpu_debugfs_sensor_read(struct file *f, char __user *buf,
valuesize = sizeof(values); valuesize = sizeof(values);
if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor) if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor)
r = adev->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, idx, &values[0], &valuesize); r = amdgpu_dpm_read_sensor(adev, idx, &values[0], &valuesize);
else if (adev->pm.funcs && adev->pm.funcs->read_sensor)
r = adev->pm.funcs->read_sensor(adev, idx, &values[0],
&valuesize);
else else
return -EINVAL; return -EINVAL;
......
...@@ -241,134 +241,119 @@ enum amdgpu_pcie_gen { ...@@ -241,134 +241,119 @@ enum amdgpu_pcie_gen {
AMDGPU_PCIE_GEN_INVALID = 0xffff AMDGPU_PCIE_GEN_INVALID = 0xffff
}; };
#define amdgpu_dpm_pre_set_power_state(adev) (adev)->pm.funcs->pre_set_power_state((adev)) #define amdgpu_dpm_pre_set_power_state(adev) \
#define amdgpu_dpm_set_power_state(adev) (adev)->pm.funcs->set_power_state((adev)) ((adev)->powerplay.pp_funcs->pre_set_power_state((adev)->powerplay.pp_handle))
#define amdgpu_dpm_post_set_power_state(adev) (adev)->pm.funcs->post_set_power_state((adev))
#define amdgpu_dpm_display_configuration_changed(adev) (adev)->pm.funcs->display_configuration_changed((adev)) #define amdgpu_dpm_set_power_state(adev) \
#define amdgpu_dpm_print_power_state(adev, ps) (adev)->pm.funcs->print_power_state((adev), (ps)) ((adev)->powerplay.pp_funcs->set_power_state((adev)->powerplay.pp_handle))
#define amdgpu_dpm_vblank_too_short(adev) (adev)->pm.funcs->vblank_too_short((adev))
#define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), (e)) #define amdgpu_dpm_post_set_power_state(adev) \
((adev)->powerplay.pp_funcs->post_set_power_state((adev)->powerplay.pp_handle))
#define amdgpu_dpm_display_configuration_changed(adev) \
((adev)->powerplay.pp_funcs->display_configuration_changed((adev)->powerplay.pp_handle))
#define amdgpu_dpm_print_power_state(adev, ps) \
((adev)->powerplay.pp_funcs->print_power_state((adev)->powerplay.pp_handle, (ps)))
#define amdgpu_dpm_vblank_too_short(adev) \
((adev)->powerplay.pp_funcs->vblank_too_short((adev)->powerplay.pp_handle))
#define amdgpu_dpm_enable_bapm(adev, e) \
((adev)->powerplay.pp_funcs->enable_bapm((adev)->powerplay.pp_handle, (e)))
#define amdgpu_dpm_read_sensor(adev, idx, value, size) \ #define amdgpu_dpm_read_sensor(adev, idx, value, size) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->read_sensor((adev)->powerplay.pp_handle, (idx), (value), (size)))
(adev)->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, (idx), (value), (size)) : \
(adev)->pm.funcs->read_sensor((adev), (idx), (value), (size)))
#define amdgpu_dpm_get_temperature(adev) \ #define amdgpu_dpm_get_temperature(adev) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle))
(adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle) : \
(adev)->pm.funcs->get_temperature((adev)))
#define amdgpu_dpm_set_fan_control_mode(adev, m) \ #define amdgpu_dpm_set_fan_control_mode(adev, m) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)))
(adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)) : \
(adev)->pm.funcs->set_fan_control_mode((adev), (m)))
#define amdgpu_dpm_get_fan_control_mode(adev) \ #define amdgpu_dpm_get_fan_control_mode(adev) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle))
(adev)->powerplay.pp_funcs->get_fan_control_mode((adev)->powerplay.pp_handle) : \
(adev)->pm.funcs->get_fan_control_mode((adev)))
#define amdgpu_dpm_set_fan_speed_percent(adev, s) \ #define amdgpu_dpm_set_fan_speed_percent(adev, s) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s)))
(adev)->powerplay.pp_funcs->set_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
(adev)->pm.funcs->set_fan_speed_percent((adev), (s)))
#define amdgpu_dpm_get_fan_speed_percent(adev, s) \ #define amdgpu_dpm_get_fan_speed_percent(adev, s) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s)))
(adev)->powerplay.pp_funcs->get_fan_speed_percent((adev)->powerplay.pp_handle, (s)) : \
(adev)->pm.funcs->get_fan_speed_percent((adev), (s)))
#define amdgpu_dpm_get_fan_speed_rpm(adev, s) \ #define amdgpu_dpm_get_fan_speed_rpm(adev, s) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_fan_speed_rpm)((adev)->powerplay.pp_handle, (s))
(adev)->powerplay.pp_funcs->get_fan_speed_rpm((adev)->powerplay.pp_handle, (s)) : \
-EINVAL)
#define amdgpu_dpm_get_sclk(adev, l) \ #define amdgpu_dpm_get_sclk(adev, l) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)))
(adev)->powerplay.pp_funcs->get_sclk((adev)->powerplay.pp_handle, (l)) : \
(adev)->pm.funcs->get_sclk((adev), (l)))
#define amdgpu_dpm_get_mclk(adev, l) \ #define amdgpu_dpm_get_mclk(adev, l) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)))
(adev)->powerplay.pp_funcs->get_mclk((adev)->powerplay.pp_handle, (l)) : \
(adev)->pm.funcs->get_mclk((adev), (l)))
#define amdgpu_dpm_force_performance_level(adev, l) \ #define amdgpu_dpm_force_performance_level(adev, l) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)))
(adev)->powerplay.pp_funcs->force_performance_level((adev)->powerplay.pp_handle, (l)) : \
(adev)->pm.funcs->force_performance_level((adev), (l)))
#define amdgpu_dpm_powergate_uvd(adev, g) \ #define amdgpu_dpm_powergate_uvd(adev, g) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)))
(adev)->powerplay.pp_funcs->powergate_uvd((adev)->powerplay.pp_handle, (g)) : \
(adev)->pm.funcs->powergate_uvd((adev), (g)))
#define amdgpu_dpm_powergate_vce(adev, g) \ #define amdgpu_dpm_powergate_vce(adev, g) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)))
(adev)->powerplay.pp_funcs->powergate_vce((adev)->powerplay.pp_handle, (g)) : \
(adev)->pm.funcs->powergate_vce((adev), (g)))
#define amdgpu_dpm_get_current_power_state(adev) \ #define amdgpu_dpm_get_current_power_state(adev) \
(adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle) ((adev)->powerplay.pp_funcs->get_current_power_state((adev)->powerplay.pp_handle))
#define amdgpu_dpm_get_pp_num_states(adev, data) \ #define amdgpu_dpm_get_pp_num_states(adev, data) \
(adev)->powerplay.pp_funcs->get_pp_num_states((adev)->powerplay.pp_handle, data) ((adev)->powerplay.pp_funcs->get_pp_num_states((adev)->powerplay.pp_handle, data))
#define amdgpu_dpm_get_pp_table(adev, table) \ #define amdgpu_dpm_get_pp_table(adev, table) \
(adev)->powerplay.pp_funcs->get_pp_table((adev)->powerplay.pp_handle, table) ((adev)->powerplay.pp_funcs->get_pp_table((adev)->powerplay.pp_handle, table))
#define amdgpu_dpm_set_pp_table(adev, buf, size) \ #define amdgpu_dpm_set_pp_table(adev, buf, size) \
(adev)->powerplay.pp_funcs->set_pp_table((adev)->powerplay.pp_handle, buf, size) ((adev)->powerplay.pp_funcs->set_pp_table((adev)->powerplay.pp_handle, buf, size))
#define amdgpu_dpm_print_clock_levels(adev, type, buf) \ #define amdgpu_dpm_print_clock_levels(adev, type, buf) \
(adev)->powerplay.pp_funcs->print_clock_levels((adev)->powerplay.pp_handle, type, buf) ((adev)->powerplay.pp_funcs->print_clock_levels((adev)->powerplay.pp_handle, type, buf))
#define amdgpu_dpm_force_clock_level(adev, type, level) \ #define amdgpu_dpm_force_clock_level(adev, type, level) \
(adev)->powerplay.pp_funcs->force_clock_level((adev)->powerplay.pp_handle, type, level) ((adev)->powerplay.pp_funcs->force_clock_level((adev)->powerplay.pp_handle, type, level))
#define amdgpu_dpm_get_sclk_od(adev) \ #define amdgpu_dpm_get_sclk_od(adev) \
(adev)->powerplay.pp_funcs->get_sclk_od((adev)->powerplay.pp_handle) ((adev)->powerplay.pp_funcs->get_sclk_od((adev)->powerplay.pp_handle))
#define amdgpu_dpm_set_sclk_od(adev, value) \ #define amdgpu_dpm_set_sclk_od(adev, value) \
(adev)->powerplay.pp_funcs->set_sclk_od((adev)->powerplay.pp_handle, value) ((adev)->powerplay.pp_funcs->set_sclk_od((adev)->powerplay.pp_handle, value))
#define amdgpu_dpm_get_mclk_od(adev) \ #define amdgpu_dpm_get_mclk_od(adev) \
((adev)->powerplay.pp_funcs->get_mclk_od((adev)->powerplay.pp_handle)) ((adev)->powerplay.pp_funcs->get_mclk_od((adev)->powerplay.pp_handle))
#define amdgpu_dpm_set_mclk_od(adev, value) \ #define amdgpu_dpm_set_mclk_od(adev, value) \
((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value)) ((adev)->powerplay.pp_funcs->set_mclk_od((adev)->powerplay.pp_handle, value))
#define amdgpu_dpm_dispatch_task(adev, task_id, input, output) \ #define amdgpu_dpm_dispatch_task(adev, task_id, input, output) \
((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output)) ((adev)->powerplay.pp_funcs->dispatch_tasks)((adev)->powerplay.pp_handle, (task_id), (input), (output))
#define amgdpu_dpm_check_state_equal(adev, cps, rps, equal) (adev)->pm.funcs->check_state_equal((adev), (cps),(rps),(equal)) #define amdgpu_dpm_check_state_equal(adev, cps, rps, equal) \
((adev)->powerplay.pp_funcs->check_state_equal((adev)->powerplay.pp_handle, (cps), (rps), (equal)))
#define amdgpu_dpm_get_vce_clock_state(adev, i) \ #define amdgpu_dpm_get_vce_clock_state(adev, i) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle, (i)))
(adev)->powerplay.pp_funcs->get_vce_clock_state((adev)->powerplay.pp_handle, (i)) : \
(adev)->pm.funcs->get_vce_clock_state((adev), (i)))
#define amdgpu_dpm_get_performance_level(adev) \ #define amdgpu_dpm_get_performance_level(adev) \
((adev)->pp_enabled ? \ ((adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle))
(adev)->powerplay.pp_funcs->get_performance_level((adev)->powerplay.pp_handle) : \
(adev)->pm.dpm.forced_level)
#define amdgpu_dpm_reset_power_profile_state(adev, request) \ #define amdgpu_dpm_reset_power_profile_state(adev, request) \
((adev)->powerplay.pp_funcs->reset_power_profile_state(\ ((adev)->powerplay.pp_funcs->reset_power_profile_state(\
(adev)->powerplay.pp_handle, request)) (adev)->powerplay.pp_handle, request))
#define amdgpu_dpm_get_power_profile_state(adev, query) \ #define amdgpu_dpm_get_power_profile_state(adev, query) \
((adev)->powerplay.pp_funcs->get_power_profile_state(\ ((adev)->powerplay.pp_funcs->get_power_profile_state(\
(adev)->powerplay.pp_handle, query)) (adev)->powerplay.pp_handle, query))
#define amdgpu_dpm_set_power_profile_state(adev, request) \ #define amdgpu_dpm_set_power_profile_state(adev, request) \
((adev)->powerplay.pp_funcs->set_power_profile_state(\ ((adev)->powerplay.pp_funcs->set_power_profile_state(\
(adev)->powerplay.pp_handle, request)) (adev)->powerplay.pp_handle, request))
#define amdgpu_dpm_switch_power_profile(adev, type) \ #define amdgpu_dpm_switch_power_profile(adev, type) \
((adev)->powerplay.pp_funcs->switch_power_profile(\ ((adev)->powerplay.pp_funcs->switch_power_profile(\
(adev)->powerplay.pp_handle, type)) (adev)->powerplay.pp_handle, type))
struct amdgpu_dpm { struct amdgpu_dpm {
...@@ -442,7 +427,6 @@ struct amdgpu_pm { ...@@ -442,7 +427,6 @@ struct amdgpu_pm {
struct amdgpu_dpm dpm; struct amdgpu_dpm dpm;
const struct firmware *fw; /* SMC firmware */ const struct firmware *fw; /* SMC firmware */
uint32_t fw_version; uint32_t fw_version;
const struct amd_pm_funcs *funcs;
uint32_t pcie_gen_mask; uint32_t pcie_gen_mask;
uint32_t pcie_mlw_mask; uint32_t pcie_mlw_mask;
struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */ struct amd_pp_display_configuration pm_display_cfg;/* set by DAL */
......
This diff is collapsed.
...@@ -87,17 +87,20 @@ static int amdgpu_pp_early_init(void *handle) ...@@ -87,17 +87,20 @@ static int amdgpu_pp_early_init(void *handle)
case CHIP_OLAND: case CHIP_OLAND:
case CHIP_HAINAN: case CHIP_HAINAN:
amd_pp->ip_funcs = &si_dpm_ip_funcs; amd_pp->ip_funcs = &si_dpm_ip_funcs;
amd_pp->pp_funcs = &si_dpm_funcs;
break; break;
#endif #endif
#ifdef CONFIG_DRM_AMDGPU_CIK #ifdef CONFIG_DRM_AMDGPU_CIK
case CHIP_BONAIRE: case CHIP_BONAIRE:
case CHIP_HAWAII: case CHIP_HAWAII:
amd_pp->ip_funcs = &ci_dpm_ip_funcs; amd_pp->ip_funcs = &ci_dpm_ip_funcs;
amd_pp->pp_funcs = &ci_dpm_funcs;
break; break;
case CHIP_KABINI: case CHIP_KABINI:
case CHIP_MULLINS: case CHIP_MULLINS:
case CHIP_KAVERI: case CHIP_KAVERI:
amd_pp->ip_funcs = &kv_dpm_ip_funcs; amd_pp->ip_funcs = &kv_dpm_ip_funcs;
amd_pp->pp_funcs = &kv_dpm_funcs;
break; break;
#endif #endif
default: default:
......
...@@ -307,7 +307,6 @@ static int ci_set_power_limit(struct amdgpu_device *adev, u32 n); ...@@ -307,7 +307,6 @@ static int ci_set_power_limit(struct amdgpu_device *adev, u32 n);
static int ci_set_overdrive_target_tdp(struct amdgpu_device *adev, static int ci_set_overdrive_target_tdp(struct amdgpu_device *adev,
u32 target_tdp); u32 target_tdp);
static int ci_update_uvd_dpm(struct amdgpu_device *adev, bool gate); static int ci_update_uvd_dpm(struct amdgpu_device *adev, bool gate);
static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev);
static void ci_dpm_set_irq_funcs(struct amdgpu_device *adev); static void ci_dpm_set_irq_funcs(struct amdgpu_device *adev);
static PPSMC_Result amdgpu_ci_send_msg_to_smc_with_parameter(struct amdgpu_device *adev, static PPSMC_Result amdgpu_ci_send_msg_to_smc_with_parameter(struct amdgpu_device *adev,
...@@ -6282,7 +6281,6 @@ static int ci_dpm_early_init(void *handle) ...@@ -6282,7 +6281,6 @@ static int ci_dpm_early_init(void *handle)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
ci_dpm_set_dpm_funcs(adev);
ci_dpm_set_irq_funcs(adev); ci_dpm_set_irq_funcs(adev);
return 0; return 0;
...@@ -7035,7 +7033,7 @@ const struct amd_ip_funcs ci_dpm_ip_funcs = { ...@@ -7035,7 +7033,7 @@ const struct amd_ip_funcs ci_dpm_ip_funcs = {
.set_powergating_state = ci_dpm_set_powergating_state, .set_powergating_state = ci_dpm_set_powergating_state,
}; };
static const struct amd_pm_funcs ci_dpm_funcs = { const struct amd_pm_funcs ci_dpm_funcs = {
.get_temperature = &ci_dpm_get_temp, .get_temperature = &ci_dpm_get_temp,
.pre_set_power_state = &ci_dpm_pre_set_power_state, .pre_set_power_state = &ci_dpm_pre_set_power_state,
.set_power_state = &ci_dpm_set_power_state, .set_power_state = &ci_dpm_set_power_state,
...@@ -7067,12 +7065,6 @@ static const struct amd_pm_funcs ci_dpm_funcs = { ...@@ -7067,12 +7065,6 @@ static const struct amd_pm_funcs ci_dpm_funcs = {
.read_sensor = ci_dpm_read_sensor, .read_sensor = ci_dpm_read_sensor,
}; };
static void ci_dpm_set_dpm_funcs(struct amdgpu_device *adev)
{
if (adev->pm.funcs == NULL)
adev->pm.funcs = &ci_dpm_funcs;
}
static const struct amdgpu_irq_src_funcs ci_dpm_irq_funcs = { static const struct amdgpu_irq_src_funcs ci_dpm_irq_funcs = {
.set = ci_dpm_set_interrupt_state, .set = ci_dpm_set_interrupt_state,
.process = ci_dpm_process_interrupt, .process = ci_dpm_process_interrupt,
......
...@@ -26,5 +26,6 @@ ...@@ -26,5 +26,6 @@
extern const struct amd_ip_funcs ci_dpm_ip_funcs; extern const struct amd_ip_funcs ci_dpm_ip_funcs;
extern const struct amd_ip_funcs kv_dpm_ip_funcs; extern const struct amd_ip_funcs kv_dpm_ip_funcs;
extern const struct amd_pm_funcs ci_dpm_funcs;
extern const struct amd_pm_funcs kv_dpm_funcs;
#endif #endif
...@@ -42,7 +42,6 @@ ...@@ -42,7 +42,6 @@
#define KV_MINIMUM_ENGINE_CLOCK 800 #define KV_MINIMUM_ENGINE_CLOCK 800
#define SMC_RAM_END 0x40000 #define SMC_RAM_END 0x40000
static void kv_dpm_set_dpm_funcs(struct amdgpu_device *adev);
static void kv_dpm_set_irq_funcs(struct amdgpu_device *adev); static void kv_dpm_set_irq_funcs(struct amdgpu_device *adev);
static int kv_enable_nb_dpm(struct amdgpu_device *adev, static int kv_enable_nb_dpm(struct amdgpu_device *adev,
bool enable); bool enable);
...@@ -2961,7 +2960,6 @@ static int kv_dpm_early_init(void *handle) ...@@ -2961,7 +2960,6 @@ static int kv_dpm_early_init(void *handle)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
kv_dpm_set_dpm_funcs(adev);
kv_dpm_set_irq_funcs(adev); kv_dpm_set_irq_funcs(adev);
return 0; return 0;
...@@ -3327,7 +3325,7 @@ const struct amd_ip_funcs kv_dpm_ip_funcs = { ...@@ -3327,7 +3325,7 @@ const struct amd_ip_funcs kv_dpm_ip_funcs = {
.set_powergating_state = kv_dpm_set_powergating_state, .set_powergating_state = kv_dpm_set_powergating_state,
}; };
static const struct amd_pm_funcs kv_dpm_funcs = { const struct amd_pm_funcs kv_dpm_funcs = {
.get_temperature = &kv_dpm_get_temp, .get_temperature = &kv_dpm_get_temp,
.pre_set_power_state = &kv_dpm_pre_set_power_state, .pre_set_power_state = &kv_dpm_pre_set_power_state,
.set_power_state = &kv_dpm_set_power_state, .set_power_state = &kv_dpm_set_power_state,
...@@ -3345,12 +3343,6 @@ static const struct amd_pm_funcs kv_dpm_funcs = { ...@@ -3345,12 +3343,6 @@ static const struct amd_pm_funcs kv_dpm_funcs = {
.read_sensor = &kv_dpm_read_sensor, .read_sensor = &kv_dpm_read_sensor,
}; };
static void kv_dpm_set_dpm_funcs(struct amdgpu_device *adev)
{
if (adev->pm.funcs == NULL)
adev->pm.funcs = &kv_dpm_funcs;
}
static const struct amdgpu_irq_src_funcs kv_dpm_irq_funcs = { static const struct amdgpu_irq_src_funcs kv_dpm_irq_funcs = {
.set = kv_dpm_set_interrupt_state, .set = kv_dpm_set_interrupt_state,
.process = kv_dpm_process_interrupt, .process = kv_dpm_process_interrupt,
......
...@@ -1847,7 +1847,6 @@ static int si_calculate_sclk_params(struct amdgpu_device *adev, ...@@ -1847,7 +1847,6 @@ static int si_calculate_sclk_params(struct amdgpu_device *adev,
static void si_thermal_start_smc_fan_control(struct amdgpu_device *adev); static void si_thermal_start_smc_fan_control(struct amdgpu_device *adev);
static void si_fan_ctrl_set_default_mode(struct amdgpu_device *adev); static void si_fan_ctrl_set_default_mode(struct amdgpu_device *adev);
static void si_dpm_set_dpm_funcs(struct amdgpu_device *adev);
static void si_dpm_set_irq_funcs(struct amdgpu_device *adev); static void si_dpm_set_irq_funcs(struct amdgpu_device *adev);
static struct si_power_info *si_get_pi(struct amdgpu_device *adev) static struct si_power_info *si_get_pi(struct amdgpu_device *adev)
...@@ -7944,7 +7943,6 @@ static int si_dpm_early_init(void *handle) ...@@ -7944,7 +7943,6 @@ static int si_dpm_early_init(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
si_dpm_set_dpm_funcs(adev);
si_dpm_set_irq_funcs(adev); si_dpm_set_irq_funcs(adev);
return 0; return 0;
} }
...@@ -8062,7 +8060,7 @@ const struct amd_ip_funcs si_dpm_ip_funcs = { ...@@ -8062,7 +8060,7 @@ const struct amd_ip_funcs si_dpm_ip_funcs = {
.set_powergating_state = si_dpm_set_powergating_state, .set_powergating_state = si_dpm_set_powergating_state,
}; };
static const struct amd_pm_funcs si_dpm_funcs = { const struct amd_pm_funcs si_dpm_funcs = {
.get_temperature = &si_dpm_get_temp, .get_temperature = &si_dpm_get_temp,
.pre_set_power_state = &si_dpm_pre_set_power_state, .pre_set_power_state = &si_dpm_pre_set_power_state,
.set_power_state = &si_dpm_set_power_state, .set_power_state = &si_dpm_set_power_state,
...@@ -8083,12 +8081,6 @@ static const struct amd_pm_funcs si_dpm_funcs = { ...@@ -8083,12 +8081,6 @@ static const struct amd_pm_funcs si_dpm_funcs = {
.read_sensor = &si_dpm_read_sensor, .read_sensor = &si_dpm_read_sensor,
}; };
static void si_dpm_set_dpm_funcs(struct amdgpu_device *adev)
{
if (adev->pm.funcs == NULL)
adev->pm.funcs = &si_dpm_funcs;
}
static const struct amdgpu_irq_src_funcs si_dpm_irq_funcs = { static const struct amdgpu_irq_src_funcs si_dpm_irq_funcs = {
.set = si_dpm_set_interrupt_state, .set = si_dpm_set_interrupt_state,
.process = si_dpm_process_interrupt, .process = si_dpm_process_interrupt,
......
...@@ -246,6 +246,7 @@ enum si_display_gap ...@@ -246,6 +246,7 @@ enum si_display_gap
}; };
extern const struct amd_ip_funcs si_dpm_ip_funcs; extern const struct amd_ip_funcs si_dpm_ip_funcs;
extern const struct amd_pm_funcs si_dpm_funcs;
struct ni_leakage_coeffients struct ni_leakage_coeffients
{ {
......
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