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Commit ceb69499 authored by Giuseppe CAVALLARO's avatar Giuseppe CAVALLARO Committed by David S. Miller
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stmmac: code tidy-up 

This patch tidies up the code. I have run Linden (and verified with checkpatch)
many part of the driver trying to reorganize some sections respecting the
codying-style rules in the points where it was not done.
Signed-off-by: default avatarGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 32ceabca
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Showing with 311 additions and 309 deletions
drivers/net/ethernet/stmicro/stmmac/chain_mode.c
View file @ ceb69499
...@@ -30,7 +30,7 @@ ...@@ -30,7 +30,7 @@
static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum)
{ {
struct stmmac_priv *priv = (struct stmmac_priv *) p; struct stmmac_priv *priv = (struct stmmac_priv *)p;
unsigned int txsize = priv->dma_tx_size; unsigned int txsize = priv->dma_tx_size;
unsigned int entry = priv->cur_tx % txsize; unsigned int entry = priv->cur_tx % txsize;
struct dma_desc *desc = priv->dma_tx + entry; struct dma_desc *desc = priv->dma_tx + entry;
...@@ -103,7 +103,7 @@ static void stmmac_init_dma_chain(void *des, dma_addr_t phy_addr, ...@@ -103,7 +103,7 @@ static void stmmac_init_dma_chain(void *des, dma_addr_t phy_addr,
dma_addr_t dma_phy = phy_addr; dma_addr_t dma_phy = phy_addr;
if (extend_desc) { if (extend_desc) {
struct dma_extended_desc *p = (struct dma_extended_desc *) des; struct dma_extended_desc *p = (struct dma_extended_desc *)des;
for (i = 0; i < (size - 1); i++) { for (i = 0; i < (size - 1); i++) {
dma_phy += sizeof(struct dma_extended_desc); dma_phy += sizeof(struct dma_extended_desc);
p->basic.des3 = (unsigned int)dma_phy; p->basic.des3 = (unsigned int)dma_phy;
...@@ -112,7 +112,7 @@ static void stmmac_init_dma_chain(void *des, dma_addr_t phy_addr, ...@@ -112,7 +112,7 @@ static void stmmac_init_dma_chain(void *des, dma_addr_t phy_addr,
p->basic.des3 = (unsigned int)phy_addr; p->basic.des3 = (unsigned int)phy_addr;
} else { } else {
struct dma_desc *p = (struct dma_desc *) des; struct dma_desc *p = (struct dma_desc *)des;
for (i = 0; i < (size - 1); i++) { for (i = 0; i < (size - 1); i++) {
dma_phy += sizeof(struct dma_desc); dma_phy += sizeof(struct dma_desc);
p->des3 = (unsigned int)dma_phy; p->des3 = (unsigned int)dma_phy;
......
drivers/net/ethernet/stmicro/stmmac/common.h
View file @ ceb69499
...@@ -182,29 +182,29 @@ struct stmmac_extra_stats { ...@@ -182,29 +182,29 @@ struct stmmac_extra_stats {
#define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */ #define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */
#define DMA_HW_FEAT_EXTHASHEN 0x00000008 /* Expanded DA Hash Filter */ #define DMA_HW_FEAT_EXTHASHEN 0x00000008 /* Expanded DA Hash Filter */
#define DMA_HW_FEAT_HASHSEL 0x00000010 /* HASH Filter */ #define DMA_HW_FEAT_HASHSEL 0x00000010 /* HASH Filter */
#define DMA_HW_FEAT_ADDMACADRSEL 0x00000020 /* Multiple MAC Addr Reg */ #define DMA_HW_FEAT_ADDMAC 0x00000020 /* Multiple MAC Addr Reg */
#define DMA_HW_FEAT_PCSSEL 0x00000040 /* PCS registers */ #define DMA_HW_FEAT_PCSSEL 0x00000040 /* PCS registers */
#define DMA_HW_FEAT_L3L4FLTREN 0x00000080 /* Layer 3 & Layer 4 Feature */ #define DMA_HW_FEAT_L3L4FLTREN 0x00000080 /* Layer 3 & Layer 4 Feature */
#define DMA_HW_FEAT_SMASEL 0x00000100 /* SMA(MDIO) Interface */ #define DMA_HW_FEAT_SMASEL 0x00000100 /* SMA(MDIO) Interface */
#define DMA_HW_FEAT_RWKSEL 0x00000200 /* PMT Remote Wakeup */ #define DMA_HW_FEAT_RWKSEL 0x00000200 /* PMT Remote Wakeup */
#define DMA_HW_FEAT_MGKSEL 0x00000400 /* PMT Magic Packet */ #define DMA_HW_FEAT_MGKSEL 0x00000400 /* PMT Magic Packet */
#define DMA_HW_FEAT_MMCSEL 0x00000800 /* RMON Module */ #define DMA_HW_FEAT_MMCSEL 0x00000800 /* RMON Module */
#define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 Timestamp */ #define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 */
#define DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 Adv Timestamp */ #define DMA_HW_FEAT_TSVER2SEL 0x00002000 /* IEEE 1588-2008 PTPv2 */
#define DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */ #define DMA_HW_FEAT_EEESEL 0x00004000 /* Energy Efficient Ethernet */
#define DMA_HW_FEAT_AVSEL 0x00008000 /* AV Feature */ #define DMA_HW_FEAT_AVSEL 0x00008000 /* AV Feature */
#define DMA_HW_FEAT_TXCOESEL 0x00010000 /* Checksum Offload in Tx */ #define DMA_HW_FEAT_TXCOESEL 0x00010000 /* Checksum Offload in Tx */
#define DMA_HW_FEAT_RXTYP1COE 0x00020000 /* IP csum Offload(Type 1) in Rx */ #define DMA_HW_FEAT_RXTYP1COE 0x00020000 /* IP COE (Type 1) in Rx */
#define DMA_HW_FEAT_RXTYP2COE 0x00040000 /* IP csum Offload(Type 2) in Rx */ #define DMA_HW_FEAT_RXTYP2COE 0x00040000 /* IP COE (Type 2) in Rx */
#define DMA_HW_FEAT_RXFIFOSIZE 0x00080000 /* Rx FIFO > 2048 Bytes */ #define DMA_HW_FEAT_RXFIFOSIZE 0x00080000 /* Rx FIFO > 2048 Bytes */
#define DMA_HW_FEAT_RXCHCNT 0x00300000 /* No. of additional Rx Channels */ #define DMA_HW_FEAT_RXCHCNT 0x00300000 /* No. additional Rx Channels */
#define DMA_HW_FEAT_TXCHCNT 0x00c00000 /* No. of additional Tx Channels */ #define DMA_HW_FEAT_TXCHCNT 0x00c00000 /* No. additional Tx Channels */
#define DMA_HW_FEAT_ENHDESSEL 0x01000000 /* Alternate (Enhanced Descriptor) */ #define DMA_HW_FEAT_ENHDESSEL 0x01000000 /* Alternate Descriptor */
#define DMA_HW_FEAT_INTTSEN 0x02000000 /* Timestamping with Internal /* Timestamping with Internal System Time */
System Time */ #define DMA_HW_FEAT_INTTSEN 0x02000000
#define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */ #define DMA_HW_FEAT_FLEXIPPSEN 0x04000000 /* Flexible PPS Output */
#define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN Insertion */ #define DMA_HW_FEAT_SAVLANINS 0x08000000 /* Source Addr or VLAN */
#define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY interface */ #define DMA_HW_FEAT_ACTPHYIF 0x70000000 /* Active/selected PHY iface */
#define DEFAULT_DMA_PBL 8 #define DEFAULT_DMA_PBL 8
/* Max/Min RI Watchdog Timer count value */ /* Max/Min RI Watchdog Timer count value */
...@@ -216,7 +216,8 @@ struct stmmac_extra_stats { ...@@ -216,7 +216,8 @@ struct stmmac_extra_stats {
#define STMMAC_TX_MAX_FRAMES 256 #define STMMAC_TX_MAX_FRAMES 256
#define STMMAC_TX_FRAMES 64 #define STMMAC_TX_FRAMES 64
enum rx_frame_status { /* IPC status */ /* Rx IPC status */
enum rx_frame_status {
good_frame = 0, good_frame = 0,
discard_frame = 1, discard_frame = 1,
csum_none = 2, csum_none = 2,
...@@ -261,9 +262,9 @@ struct dma_features { ...@@ -261,9 +262,9 @@ struct dma_features {
unsigned int pmt_remote_wake_up; unsigned int pmt_remote_wake_up;
unsigned int pmt_magic_frame; unsigned int pmt_magic_frame;
unsigned int rmon; unsigned int rmon;
/* IEEE 1588-2002*/ /* IEEE 1588-2002 */
unsigned int time_stamp; unsigned int time_stamp;
/* IEEE 1588-2008*/ /* IEEE 1588-2008 */
unsigned int atime_stamp; unsigned int atime_stamp;
/* 802.3az - Energy-Efficient Ethernet (EEE) */ /* 802.3az - Energy-Efficient Ethernet (EEE) */
unsigned int eee; unsigned int eee;
...@@ -276,7 +277,7 @@ struct dma_features { ...@@ -276,7 +277,7 @@ struct dma_features {
/* TX and RX number of channels */ /* TX and RX number of channels */
unsigned int number_rx_channel; unsigned int number_rx_channel;
unsigned int number_tx_channel; unsigned int number_tx_channel;
/* Alternate (enhanced) DESC mode*/ /* Alternate (enhanced) DESC mode */
unsigned int enh_desc; unsigned int enh_desc;
}; };
...@@ -344,7 +345,7 @@ struct stmmac_desc_ops { ...@@ -344,7 +345,7 @@ struct stmmac_desc_ops {
/* get tx timestamp status */ /* get tx timestamp status */
int (*get_tx_timestamp_status) (struct dma_desc *p); int (*get_tx_timestamp_status) (struct dma_desc *p);
/* get timestamp value */ /* get timestamp value */
u64 (*get_timestamp) (void *desc, u32 ats); u64(*get_timestamp) (void *desc, u32 ats);
/* get rx timestamp status */ /* get rx timestamp status */
int (*get_rx_timestamp_status) (void *desc, u32 ats); int (*get_rx_timestamp_status) (void *desc, u32 ats);
}; };
...@@ -378,7 +379,7 @@ struct stmmac_dma_ops { ...@@ -378,7 +379,7 @@ struct stmmac_dma_ops {
struct stmmac_ops { struct stmmac_ops {
/* MAC core initialization */ /* MAC core initialization */
void (*core_init) (void __iomem *ioaddr) ____cacheline_aligned; void (*core_init) (void __iomem *ioaddr);
/* Enable and verify that the IPC module is supported */ /* Enable and verify that the IPC module is supported */
int (*rx_ipc) (void __iomem *ioaddr); int (*rx_ipc) (void __iomem *ioaddr);
/* Dump MAC registers */ /* Dump MAC registers */
...@@ -410,10 +411,10 @@ struct stmmac_hwtimestamp { ...@@ -410,10 +411,10 @@ struct stmmac_hwtimestamp {
void (*config_hw_tstamping) (void __iomem *ioaddr, u32 data); void (*config_hw_tstamping) (void __iomem *ioaddr, u32 data);
void (*config_sub_second_increment) (void __iomem *ioaddr); void (*config_sub_second_increment) (void __iomem *ioaddr);
int (*init_systime) (void __iomem *ioaddr, u32 sec, u32 nsec); int (*init_systime) (void __iomem *ioaddr, u32 sec, u32 nsec);
int (*config_addend)(void __iomem *ioaddr, u32 addend); int (*config_addend) (void __iomem *ioaddr, u32 addend);
int (*adjust_systime)(void __iomem *ioaddr, u32 sec, u32 nsec, int (*adjust_systime) (void __iomem *ioaddr, u32 sec, u32 nsec,
int add_sub); int add_sub);
u64 (*get_systime)(void __iomem *ioaddr); u64(*get_systime) (void __iomem *ioaddr);
}; };
struct mac_link { struct mac_link {
......
drivers/net/ethernet/stmicro/stmmac/descs_com.h
View file @ ceb69499
...@@ -117,8 +117,7 @@ static inline void ndesc_rx_set_on_chain(struct dma_desc *p, int end) ...@@ -117,8 +117,7 @@ static inline void ndesc_rx_set_on_chain(struct dma_desc *p, int end)
p->des01.rx.second_address_chained = 1; p->des01.rx.second_address_chained = 1;
} }
static inline void ndesc_tx_set_on_chain(struct dma_desc *p, int static inline void ndesc_tx_set_on_chain(struct dma_desc *p, int ring_size)
ring_size)
{ {
p->des01.tx.second_address_chained = 1; p->des01.tx.second_address_chained = 1;
} }
......
drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
View file @ ceb69499
...@@ -141,7 +141,7 @@ enum inter_frame_gap { ...@@ -141,7 +141,7 @@ enum inter_frame_gap {
GMAC_CONTROL_IFG_80 = 0x00020000, GMAC_CONTROL_IFG_80 = 0x00020000,
GMAC_CONTROL_IFG_40 = 0x000e0000, GMAC_CONTROL_IFG_40 = 0x000e0000,
}; };
#define GMAC_CONTROL_DCRS 0x00010000 /* Disable carrier sense during tx */ #define GMAC_CONTROL_DCRS 0x00010000 /* Disable carrier sense */
#define GMAC_CONTROL_PS 0x00008000 /* Port Select 0:GMI 1:MII */ #define GMAC_CONTROL_PS 0x00008000 /* Port Select 0:GMI 1:MII */
#define GMAC_CONTROL_FES 0x00004000 /* Speed 0:10 1:100 */ #define GMAC_CONTROL_FES 0x00004000 /* Speed 0:10 1:100 */
#define GMAC_CONTROL_DO 0x00002000 /* Disable Rx Own */ #define GMAC_CONTROL_DO 0x00002000 /* Disable Rx Own */
...@@ -150,7 +150,7 @@ enum inter_frame_gap { ...@@ -150,7 +150,7 @@ enum inter_frame_gap {
#define GMAC_CONTROL_IPC 0x00000400 /* Checksum Offload */ #define GMAC_CONTROL_IPC 0x00000400 /* Checksum Offload */
#define GMAC_CONTROL_DR 0x00000200 /* Disable Retry */ #define GMAC_CONTROL_DR 0x00000200 /* Disable Retry */
#define GMAC_CONTROL_LUD 0x00000100 /* Link up/down */ #define GMAC_CONTROL_LUD 0x00000100 /* Link up/down */
#define GMAC_CONTROL_ACS 0x00000080 /* Automatic Pad/FCS Stripping */ #define GMAC_CONTROL_ACS 0x00000080 /* Auto Pad/FCS Stripping */
#define GMAC_CONTROL_DC 0x00000010 /* Deferral Check */ #define GMAC_CONTROL_DC 0x00000010 /* Deferral Check */
#define GMAC_CONTROL_TE 0x00000008 /* Transmitter Enable */ #define GMAC_CONTROL_TE 0x00000008 /* Transmitter Enable */
#define GMAC_CONTROL_RE 0x00000004 /* Receiver Enable */ #define GMAC_CONTROL_RE 0x00000004 /* Receiver Enable */
...@@ -191,9 +191,9 @@ enum inter_frame_gap { ...@@ -191,9 +191,9 @@ enum inter_frame_gap {
#define DMA_BUS_MODE_ATDS 0x00000080 /* Alternate Descriptor Size */ #define DMA_BUS_MODE_ATDS 0x00000080 /* Alternate Descriptor Size */
enum rx_tx_priority_ratio { enum rx_tx_priority_ratio {
double_ratio = 0x00004000, /*2:1 */ double_ratio = 0x00004000, /* 2:1 */
triple_ratio = 0x00008000, /*3:1 */ triple_ratio = 0x00008000, /* 3:1 */
quadruple_ratio = 0x0000c000, /*4:1 */ quadruple_ratio = 0x0000c000, /* 4:1 */
}; };
#define DMA_BUS_MODE_FB 0x00010000 /* Fixed burst */ #define DMA_BUS_MODE_FB 0x00010000 /* Fixed burst */
...@@ -213,7 +213,8 @@ enum rx_tx_priority_ratio { ...@@ -213,7 +213,8 @@ enum rx_tx_priority_ratio {
#define DMA_BUS_FB 0x00010000 /* Fixed Burst */ #define DMA_BUS_FB 0x00010000 /* Fixed Burst */
/* DMA operation mode defines (start/stop tx/rx are placed in common header)*/ /* DMA operation mode defines (start/stop tx/rx are placed in common header)*/
#define DMA_CONTROL_DT 0x04000000 /* Disable Drop TCP/IP csum error */ /* Disable Drop TCP/IP csum error */
#define DMA_CONTROL_DT 0x04000000
#define DMA_CONTROL_RSF 0x02000000 /* Receive Store and Forward */ #define DMA_CONTROL_RSF 0x02000000 /* Receive Store and Forward */
#define DMA_CONTROL_DFF 0x01000000 /* Disaable flushing */ #define DMA_CONTROL_DFF 0x01000000 /* Disaable flushing */
/* Threshold for Activating the FC */ /* Threshold for Activating the FC */
...@@ -264,7 +265,5 @@ enum rtc_control { ...@@ -264,7 +265,5 @@ enum rtc_control {
#define GMAC_MMC_TX_INTR 0x108 #define GMAC_MMC_TX_INTR 0x108
#define GMAC_MMC_RX_CSUM_OFFLOAD 0x208 #define GMAC_MMC_RX_CSUM_OFFLOAD 0x208
extern const struct stmmac_dma_ops dwmac1000_dma_ops; extern const struct stmmac_dma_ops dwmac1000_dma_ops;
#endif /* __DWMAC1000_H__ */ #endif /* __DWMAC1000_H__ */
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
View file @ ceb69499
...@@ -87,7 +87,7 @@ static void dwmac1000_get_umac_addr(void __iomem *ioaddr, unsigned char *addr, ...@@ -87,7 +87,7 @@ static void dwmac1000_get_umac_addr(void __iomem *ioaddr, unsigned char *addr,
static void dwmac1000_set_filter(struct net_device *dev, int id) static void dwmac1000_set_filter(struct net_device *dev, int id)
{ {
void __iomem *ioaddr = (void __iomem *) dev->base_addr; void __iomem *ioaddr = (void __iomem *)dev->base_addr;
unsigned int value = 0; unsigned int value = 0;
unsigned int perfect_addr_number; unsigned int perfect_addr_number;
...@@ -111,12 +111,13 @@ static void dwmac1000_set_filter(struct net_device *dev, int id) ...@@ -111,12 +111,13 @@ static void dwmac1000_set_filter(struct net_device *dev, int id)
memset(mc_filter, 0, sizeof(mc_filter)); memset(mc_filter, 0, sizeof(mc_filter));
netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr(ha, dev) {
/* The upper 6 bits of the calculated CRC are used to /* The upper 6 bits of the calculated CRC are used to
index the contens of the hash table */ * index the contens of the hash table
int bit_nr = */
bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26; int bit_nr = bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26;
/* The most significant bit determines the register to /* The most significant bit determines the register to
* use (H/L) while the other 5 bits determine the bit * use (H/L) while the other 5 bits determine the bit
* within the register. */ * within the register.
*/
mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
} }
writel(mc_filter[0], ioaddr + GMAC_HASH_LOW); writel(mc_filter[0], ioaddr + GMAC_HASH_LOW);
...@@ -129,10 +130,11 @@ static void dwmac1000_set_filter(struct net_device *dev, int id) ...@@ -129,10 +130,11 @@ static void dwmac1000_set_filter(struct net_device *dev, int id)
else else
perfect_addr_number = GMAC_MAX_PERFECT_ADDRESSES / 2; perfect_addr_number = GMAC_MAX_PERFECT_ADDRESSES / 2;
/* Handle multiple unicast addresses (perfect filtering)*/ /* Handle multiple unicast addresses (perfect filtering) */
if (netdev_uc_count(dev) > perfect_addr_number) if (netdev_uc_count(dev) > perfect_addr_number)
/* Switch to promiscuous mode is more than 16 addrs /* Switch to promiscuous mode if more than 16 addrs
are required */ * are required
*/
value |= GMAC_FRAME_FILTER_PR; value |= GMAC_FRAME_FILTER_PR;
else { else {
int reg = 1; int reg = 1;
...@@ -150,8 +152,8 @@ static void dwmac1000_set_filter(struct net_device *dev, int id) ...@@ -150,8 +152,8 @@ static void dwmac1000_set_filter(struct net_device *dev, int id)
#endif #endif
writel(value, ioaddr + GMAC_FRAME_FILTER); writel(value, ioaddr + GMAC_FRAME_FILTER);
CHIP_DBG(KERN_INFO "\tFrame Filter reg: 0x%08x\n\tHash regs: " CHIP_DBG(KERN_INFO "\tFilter: 0x%08x\n\tHash: HI 0x%08x, LO 0x%08x\n",
"HI 0x%08x, LO 0x%08x\n", readl(ioaddr + GMAC_FRAME_FILTER), readl(ioaddr + GMAC_FRAME_FILTER),
readl(ioaddr + GMAC_HASH_HIGH), readl(ioaddr + GMAC_HASH_LOW)); readl(ioaddr + GMAC_HASH_HIGH), readl(ioaddr + GMAC_HASH_LOW));
} }
...@@ -218,8 +220,7 @@ static int dwmac1000_irq_status(void __iomem *ioaddr, ...@@ -218,8 +220,7 @@ static int dwmac1000_irq_status(void __iomem *ioaddr,
} }
if (unlikely(intr_status & pmt_irq)) { if (unlikely(intr_status & pmt_irq)) {
CHIP_DBG(KERN_INFO "GMAC: received Magic frame\n"); CHIP_DBG(KERN_INFO "GMAC: received Magic frame\n");
/* clear the PMT bits 5 and 6 by reading the PMT /* clear the PMT bits 5 and 6 by reading the PMT status reg */
* status register. */
readl(ioaddr + GMAC_PMT); readl(ioaddr + GMAC_PMT);
x->irq_receive_pmt_irq_n++; x->irq_receive_pmt_irq_n++;
} }
...@@ -270,7 +271,7 @@ static int dwmac1000_irq_status(void __iomem *ioaddr, ...@@ -270,7 +271,7 @@ static int dwmac1000_irq_status(void __iomem *ioaddr,
x->pcs_speed = SPEED_10; x->pcs_speed = SPEED_10;
x->pcs_link = 1; x->pcs_link = 1;
pr_debug("Link is Up - %d/%s\n", (int) x->pcs_speed, pr_debug("Link is Up - %d/%s\n", (int)x->pcs_speed,
x->pcs_duplex ? "Full" : "Half"); x->pcs_duplex ? "Full" : "Half");
} else { } else {
x->pcs_link = 0; x->pcs_link = 0;
...@@ -287,7 +288,8 @@ static void dwmac1000_set_eee_mode(void __iomem *ioaddr) ...@@ -287,7 +288,8 @@ static void dwmac1000_set_eee_mode(void __iomem *ioaddr)
/* Enable the link status receive on RGMII, SGMII ore SMII /* Enable the link status receive on RGMII, SGMII ore SMII
* receive path and instruct the transmit to enter in LPI * receive path and instruct the transmit to enter in LPI
* state. */ * state.
*/
value = readl(ioaddr + LPI_CTRL_STATUS); value = readl(ioaddr + LPI_CTRL_STATUS);
value |= LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA; value |= LPI_CTRL_STATUS_LPIEN | LPI_CTRL_STATUS_LPITXA;
writel(value, ioaddr + LPI_CTRL_STATUS); writel(value, ioaddr + LPI_CTRL_STATUS);
......
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
View file @ ceb69499
...@@ -94,14 +94,16 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb, ...@@ -94,14 +94,16 @@ static int dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
* *
* For Non Fixed Burst Mode: provide the maximum value of the * For Non Fixed Burst Mode: provide the maximum value of the
* burst length. Any burst equal or below the provided burst * burst length. Any burst equal or below the provided burst
* length would be allowed to perform. */ * length would be allowed to perform.
*/
writel(burst_len, ioaddr + DMA_AXI_BUS_MODE); writel(burst_len, ioaddr + DMA_AXI_BUS_MODE);
/* Mask interrupts by writing to CSR7 */ /* Mask interrupts by writing to CSR7 */
writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA); writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
/* The base address of the RX/TX descriptor lists must be written into /* RX/TX descriptor base address lists must be written into
* DMA CSR3 and CSR4, respectively. */ * DMA CSR3 and CSR4, respectively
*/
writel(dma_tx, ioaddr + DMA_TX_BASE_ADDR); writel(dma_tx, ioaddr + DMA_TX_BASE_ADDR);
writel(dma_rx, ioaddr + DMA_RCV_BASE_ADDR); writel(dma_rx, ioaddr + DMA_RCV_BASE_ADDR);
...@@ -118,11 +120,12 @@ static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode, ...@@ -118,11 +120,12 @@ static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode,
/* Transmit COE type 2 cannot be done in cut-through mode. */ /* Transmit COE type 2 cannot be done in cut-through mode. */
csr6 |= DMA_CONTROL_TSF; csr6 |= DMA_CONTROL_TSF;
/* Operating on second frame increase the performance /* Operating on second frame increase the performance
* especially when transmit store-and-forward is used.*/ * especially when transmit store-and-forward is used.
*/
csr6 |= DMA_CONTROL_OSF; csr6 |= DMA_CONTROL_OSF;
} else { } else {
CHIP_DBG(KERN_DEBUG "GMAC: disabling TX store and forward mode" CHIP_DBG(KERN_DEBUG "GMAC: disabling TX SF (threshold %d)\n",
" (threshold = %d)\n", txmode); txmode);
csr6 &= ~DMA_CONTROL_TSF; csr6 &= ~DMA_CONTROL_TSF;
csr6 &= DMA_CONTROL_TC_TX_MASK; csr6 &= DMA_CONTROL_TC_TX_MASK;
/* Set the transmit threshold */ /* Set the transmit threshold */
...@@ -142,8 +145,8 @@ static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode, ...@@ -142,8 +145,8 @@ static void dwmac1000_dma_operation_mode(void __iomem *ioaddr, int txmode,
CHIP_DBG(KERN_DEBUG "GMAC: enable RX store and forward mode\n"); CHIP_DBG(KERN_DEBUG "GMAC: enable RX store and forward mode\n");
csr6 |= DMA_CONTROL_RSF; csr6 |= DMA_CONTROL_RSF;
} else { } else {
CHIP_DBG(KERN_DEBUG "GMAC: disabling RX store and forward mode" CHIP_DBG(KERN_DEBUG "GMAC: disable RX SF mode (threshold %d)\n",
" (threshold = %d)\n", rxmode); rxmode);
csr6 &= ~DMA_CONTROL_RSF; csr6 &= ~DMA_CONTROL_RSF;
csr6 &= DMA_CONTROL_TC_RX_MASK; csr6 &= DMA_CONTROL_TC_RX_MASK;
if (rxmode <= 32) if (rxmode <= 32)
......
drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
View file @ ceb69499
...@@ -47,8 +47,7 @@ static void dwmac100_dump_mac_regs(void __iomem *ioaddr) ...@@ -47,8 +47,7 @@ static void dwmac100_dump_mac_regs(void __iomem *ioaddr)
{ {
pr_info("\t----------------------------------------------\n" pr_info("\t----------------------------------------------\n"
"\t DWMAC 100 CSR (base addr = 0x%p)\n" "\t DWMAC 100 CSR (base addr = 0x%p)\n"
"\t----------------------------------------------\n", "\t----------------------------------------------\n", ioaddr);
ioaddr);
pr_info("\tcontrol reg (offset 0x%x): 0x%08x\n", MAC_CONTROL, pr_info("\tcontrol reg (offset 0x%x): 0x%08x\n", MAC_CONTROL,
readl(ioaddr + MAC_CONTROL)); readl(ioaddr + MAC_CONTROL));
pr_info("\taddr HI (offset 0x%x): 0x%08x\n ", MAC_ADDR_HIGH, pr_info("\taddr HI (offset 0x%x): 0x%08x\n ", MAC_ADDR_HIGH,
...@@ -92,7 +91,7 @@ static void dwmac100_get_umac_addr(void __iomem *ioaddr, unsigned char *addr, ...@@ -92,7 +91,7 @@ static void dwmac100_get_umac_addr(void __iomem *ioaddr, unsigned char *addr,
static void dwmac100_set_filter(struct net_device *dev, int id) static void dwmac100_set_filter(struct net_device *dev, int id)
{ {
void __iomem *ioaddr = (void __iomem *) dev->base_addr; void __iomem *ioaddr = (void __iomem *)dev->base_addr;
u32 value = readl(ioaddr + MAC_CONTROL); u32 value = readl(ioaddr + MAC_CONTROL);
if (dev->flags & IFF_PROMISC) { if (dev->flags & IFF_PROMISC) {
...@@ -113,7 +112,8 @@ static void dwmac100_set_filter(struct net_device *dev, int id) ...@@ -113,7 +112,8 @@ static void dwmac100_set_filter(struct net_device *dev, int id)
struct netdev_hw_addr *ha; struct netdev_hw_addr *ha;
/* Perfect filter mode for physical address and Hash /* Perfect filter mode for physical address and Hash
filter for multicast */ * filter for multicast
*/
value |= MAC_CONTROL_HP; value |= MAC_CONTROL_HP;
value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR | value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR |
MAC_CONTROL_IF | MAC_CONTROL_HO); MAC_CONTROL_IF | MAC_CONTROL_HO);
...@@ -121,12 +121,13 @@ static void dwmac100_set_filter(struct net_device *dev, int id) ...@@ -121,12 +121,13 @@ static void dwmac100_set_filter(struct net_device *dev, int id)
memset(mc_filter, 0, sizeof(mc_filter)); memset(mc_filter, 0, sizeof(mc_filter));
netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr(ha, dev) {
/* The upper 6 bits of the calculated CRC are used to /* The upper 6 bits of the calculated CRC are used to
* index the contens of the hash table */ * index the contens of the hash table
int bit_nr = */
ether_crc(ETH_ALEN, ha->addr) >> 26; int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
/* The most significant bit determines the register to /* The most significant bit determines the register to
* use (H/L) while the other 5 bits determine the bit * use (H/L) while the other 5 bits determine the bit
* within the register. */ * within the register.
*/
mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
} }
writel(mc_filter[0], ioaddr + MAC_HASH_LOW); writel(mc_filter[0], ioaddr + MAC_HASH_LOW);
...@@ -135,8 +136,7 @@ static void dwmac100_set_filter(struct net_device *dev, int id) ...@@ -135,8 +136,7 @@ static void dwmac100_set_filter(struct net_device *dev, int id)
writel(value, ioaddr + MAC_CONTROL); writel(value, ioaddr + MAC_CONTROL);
CHIP_DBG(KERN_INFO "%s: CTRL reg: 0x%08x Hash regs: " CHIP_DBG(KERN_INFO "%s: Filter: 0x%08x Hash: HI 0x%08x, LO 0x%08x\n",
"HI 0x%08x, LO 0x%08x\n",
__func__, readl(ioaddr + MAC_CONTROL), __func__, readl(ioaddr + MAC_CONTROL),
readl(ioaddr + MAC_HASH_HIGH), readl(ioaddr + MAC_HASH_LOW)); readl(ioaddr + MAC_HASH_HIGH), readl(ioaddr + MAC_HASH_LOW));
} }
...@@ -151,9 +151,7 @@ static void dwmac100_flow_ctrl(void __iomem *ioaddr, unsigned int duplex, ...@@ -151,9 +151,7 @@ static void dwmac100_flow_ctrl(void __iomem *ioaddr, unsigned int duplex,
writel(flow, ioaddr + MAC_FLOW_CTRL); writel(flow, ioaddr + MAC_FLOW_CTRL);
} }
/* No PMT module supported for this Ethernet Controller. /* No PMT module supported on ST boards with this Eth chip. */
* Tested on ST platforms only.
*/
static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode) static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode)
{ {
return; return;
......
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
View file @ ceb69499
...@@ -57,17 +57,20 @@ static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb, ...@@ -57,17 +57,20 @@ static int dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
/* Mask interrupts by writing to CSR7 */ /* Mask interrupts by writing to CSR7 */
writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA); writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
/* The base address of the RX/TX descriptor lists must be written into /* RX/TX descriptor base addr lists must be written into
* DMA CSR3 and CSR4, respectively. */ * DMA CSR3 and CSR4, respectively
*/
writel(dma_tx, ioaddr + DMA_TX_BASE_ADDR); writel(dma_tx, ioaddr + DMA_TX_BASE_ADDR);
writel(dma_rx, ioaddr + DMA_RCV_BASE_ADDR); writel(dma_rx, ioaddr + DMA_RCV_BASE_ADDR);
return 0; return 0;
} }
/* Store and Forward capability is not used at all.. /* Store and Forward capability is not used at all.
* The transmit threshold can be programmed by *
* setting the TTC bits in the DMA control register.*/ * The transmit threshold can be programmed by setting the TTC bits in the DMA
* control register.
*/
static void dwmac100_dma_operation_mode(void __iomem *ioaddr, int txmode, static void dwmac100_dma_operation_mode(void __iomem *ioaddr, int txmode,
int rxmode) int rxmode)
{ {
...@@ -98,8 +101,7 @@ static void dwmac100_dump_dma_regs(void __iomem *ioaddr) ...@@ -98,8 +101,7 @@ static void dwmac100_dump_dma_regs(void __iomem *ioaddr)
DMA_CUR_RX_BUF_ADDR, readl(ioaddr + DMA_CUR_RX_BUF_ADDR)); DMA_CUR_RX_BUF_ADDR, readl(ioaddr + DMA_CUR_RX_BUF_ADDR));
} }
/* DMA controller has two counters to track the number of /* DMA controller has two counters to track the number of the missed frames. */
* the receive missed frames. */
static void dwmac100_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x, static void dwmac100_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x,
void __iomem *ioaddr) void __iomem *ioaddr)
{ {
......
drivers/net/ethernet/stmicro/stmmac/mmc.h
View file @ ceb69499
...@@ -28,8 +28,7 @@ ...@@ -28,8 +28,7 @@
/* MMC control register */ /* MMC control register */
/* When set, all counter are reset */ /* When set, all counter are reset */
#define MMC_CNTRL_COUNTER_RESET 0x1 #define MMC_CNTRL_COUNTER_RESET 0x1
/* When set, do not roll over zero /* When set, do not roll over zero after reaching the max value*/
* after reaching the max value*/
#define MMC_CNTRL_COUNTER_STOP_ROLLOVER 0x2 #define MMC_CNTRL_COUNTER_STOP_ROLLOVER 0x2
#define MMC_CNTRL_RESET_ON_READ 0x4 /* Reset after reading */ #define MMC_CNTRL_RESET_ON_READ 0x4 /* Reset after reading */
#define MMC_CNTRL_COUNTER_FREEZER 0x8 /* Freeze counter values to the #define MMC_CNTRL_COUNTER_FREEZER 0x8 /* Freeze counter values to the
......
drivers/net/ethernet/stmicro/stmmac/norm_desc.c
View file @ ceb69499
...@@ -79,8 +79,8 @@ static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x, ...@@ -79,8 +79,8 @@ static int ndesc_get_rx_status(void *data, struct stmmac_extra_stats *x,
struct net_device_stats *stats = (struct net_device_stats *)data; struct net_device_stats *stats = (struct net_device_stats *)data;
if (unlikely(p->des01.rx.last_descriptor == 0)) { if (unlikely(p->des01.rx.last_descriptor == 0)) {
pr_warning("ndesc Error: Oversized Ethernet " pr_warn("%s: Oversized frame spanned multiple buffers\n",
"frame spanned multiple buffers\n"); __func__);
stats->rx_length_errors++; stats->rx_length_errors++;
return discard_frame; return discard_frame;
} }
......
drivers/net/ethernet/stmicro/stmmac/ring_mode.c
View file @ ceb69499
...@@ -30,7 +30,7 @@ ...@@ -30,7 +30,7 @@
static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum)
{ {
struct stmmac_priv *priv = (struct stmmac_priv *) p; struct stmmac_priv *priv = (struct stmmac_priv *)p;
unsigned int txsize = priv->dma_tx_size; unsigned int txsize = priv->dma_tx_size;
unsigned int entry = priv->cur_tx % txsize; unsigned int entry = priv->cur_tx % txsize;
struct dma_desc *desc = priv->dma_tx + entry; struct dma_desc *desc = priv->dma_tx + entry;
......
drivers/net/ethernet/stmicro/stmmac/stmmac.h
View file @ ceb69499
...@@ -142,6 +142,7 @@ static inline int stmmac_register_platform(void) ...@@ -142,6 +142,7 @@ static inline int stmmac_register_platform(void)
return err; return err;
} }
static inline void stmmac_unregister_platform(void) static inline void stmmac_unregister_platform(void)
{ {
platform_driver_unregister(&stmmac_pltfr_driver); platform_driver_unregister(&stmmac_pltfr_driver);
...@@ -153,6 +154,7 @@ static inline int stmmac_register_platform(void) ...@@ -153,6 +154,7 @@ static inline int stmmac_register_platform(void)
return 0; return 0;
} }
static inline void stmmac_unregister_platform(void) static inline void stmmac_unregister_platform(void)
{ {
} }
...@@ -170,6 +172,7 @@ static inline int stmmac_register_pci(void) ...@@ -170,6 +172,7 @@ static inline int stmmac_register_pci(void)
return err; return err;
} }
static inline void stmmac_unregister_pci(void) static inline void stmmac_unregister_pci(void)
{ {
pci_unregister_driver(&stmmac_pci_driver); pci_unregister_driver(&stmmac_pci_driver);
...@@ -181,6 +184,7 @@ static inline int stmmac_register_pci(void) ...@@ -181,6 +184,7 @@ static inline int stmmac_register_pci(void)
return 0; return 0;
} }
static inline void stmmac_unregister_pci(void) static inline void stmmac_unregister_pci(void)
{ {
} }
......
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
View file @ ceb69499
...@@ -46,7 +46,7 @@ ...@@ -46,7 +46,7 @@
#ifdef CONFIG_STMMAC_DEBUG_FS #ifdef CONFIG_STMMAC_DEBUG_FS
#include <linux/debugfs.h> #include <linux/debugfs.h>
#include <linux/seq_file.h> #include <linux/seq_file.h>
#endif #endif /* CONFIG_STMMAC_DEBUG_FS */
#include <linux/net_tstamp.h> #include <linux/net_tstamp.h>
#include "stmmac_ptp.h" #include "stmmac_ptp.h"
#include "stmmac.h" #include "stmmac.h"
...@@ -192,7 +192,12 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) ...@@ -192,7 +192,12 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
clk_rate = clk_get_rate(priv->stmmac_clk); clk_rate = clk_get_rate(priv->stmmac_clk);
/* Platform provided default clk_csr would be assumed valid /* Platform provided default clk_csr would be assumed valid
* for all other cases except for the below mentioned ones. */ * for all other cases except for the below mentioned ones.
* For values higher than the IEEE 802.3 specified frequency
* we can not estimate the proper divider as it is not known
* the frequency of clk_csr_i. So we do not change the default
* divider.
*/
if (!(priv->clk_csr & MAC_CSR_H_FRQ_MASK)) { if (!(priv->clk_csr & MAC_CSR_H_FRQ_MASK)) {
if (clk_rate < CSR_F_35M) if (clk_rate < CSR_F_35M)
priv->clk_csr = STMMAC_CSR_20_35M; priv->clk_csr = STMMAC_CSR_20_35M;
...@@ -206,10 +211,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) ...@@ -206,10 +211,7 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv)
priv->clk_csr = STMMAC_CSR_150_250M; priv->clk_csr = STMMAC_CSR_150_250M;
else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M))
priv->clk_csr = STMMAC_CSR_250_300M; priv->clk_csr = STMMAC_CSR_250_300M;
} /* For values higher than the IEEE 802.3 specified frequency }
* we can not estimate the proper divider as it is not known
* the frequency of clk_csr_i. So we do not change the default
* divider. */
} }
#if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG) #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
...@@ -245,8 +247,7 @@ static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv) ...@@ -245,8 +247,7 @@ static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
struct phy_device *phydev = priv->phydev; struct phy_device *phydev = priv->phydev;
if (likely(priv->plat->fix_mac_speed)) if (likely(priv->plat->fix_mac_speed))
priv->plat->fix_mac_speed(priv->plat->bsp_priv, priv->plat->fix_mac_speed(priv->plat->bsp_priv, phydev->speed);
phydev->speed);
} }
/** /**
...@@ -351,8 +352,7 @@ static void stmmac_eee_adjust(struct stmmac_priv *priv) ...@@ -351,8 +352,7 @@ static void stmmac_eee_adjust(struct stmmac_priv *priv)
* and also perform some sanity checks. * and also perform some sanity checks.
*/ */
static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv, static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv,
unsigned int entry, unsigned int entry, struct sk_buff *skb)
struct sk_buff *skb)
{ {
struct skb_shared_hwtstamps shhwtstamp; struct skb_shared_hwtstamps shhwtstamp;
u64 ns; u64 ns;
...@@ -361,7 +361,7 @@ static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv, ...@@ -361,7 +361,7 @@ static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv,
if (!priv->hwts_tx_en) if (!priv->hwts_tx_en)
return; return;
/* if skb doesn't support hw tstamp */ /* exit if skb doesn't support hw tstamp */
if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS))) if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS)))
return; return;
...@@ -394,8 +394,7 @@ static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv, ...@@ -394,8 +394,7 @@ static void stmmac_get_tx_hwtstamp(struct stmmac_priv *priv,
* and pass it to stack. It also perform some sanity checks. * and pass it to stack. It also perform some sanity checks.
*/ */
static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv, static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv,
unsigned int entry, unsigned int entry, struct sk_buff *skb)
struct sk_buff *skb)
{ {
struct skb_shared_hwtstamps *shhwtstamp = NULL; struct skb_shared_hwtstamps *shhwtstamp = NULL;
u64 ns; u64 ns;
...@@ -409,7 +408,7 @@ static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv, ...@@ -409,7 +408,7 @@ static void stmmac_get_rx_hwtstamp(struct stmmac_priv *priv,
else else
desc = (priv->dma_rx + entry); desc = (priv->dma_rx + entry);
/* if rx tstamp is not valid */ /* exit if rx tstamp is not valid */
if (!priv->hw->desc->get_rx_timestamp_status(desc, priv->adv_ts)) if (!priv->hw->desc->get_rx_timestamp_status(desc, priv->adv_ts))
return; return;
...@@ -479,13 +478,13 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -479,13 +478,13 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
if (priv->adv_ts) { if (priv->adv_ts) {
switch (config.rx_filter) { switch (config.rx_filter) {
/* time stamp no incoming packet at all */
case HWTSTAMP_FILTER_NONE: case HWTSTAMP_FILTER_NONE:
/* time stamp no incoming packet at all */
config.rx_filter = HWTSTAMP_FILTER_NONE; config.rx_filter = HWTSTAMP_FILTER_NONE;
break; break;
/* PTP v1, UDP, any kind of event packet */
case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
/* PTP v1, UDP, any kind of event packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
/* take time stamp for all event messages */ /* take time stamp for all event messages */
snap_type_sel = PTP_TCR_SNAPTYPSEL_1; snap_type_sel = PTP_TCR_SNAPTYPSEL_1;
...@@ -494,8 +493,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -494,8 +493,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
break; break;
/* PTP v1, UDP, Sync packet */
case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
/* PTP v1, UDP, Sync packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC; config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_SYNC;
/* take time stamp for SYNC messages only */ /* take time stamp for SYNC messages only */
ts_event_en = PTP_TCR_TSEVNTENA; ts_event_en = PTP_TCR_TSEVNTENA;
...@@ -504,8 +503,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -504,8 +503,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
break; break;
/* PTP v1, UDP, Delay_req packet */
case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
/* PTP v1, UDP, Delay_req packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ; config.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ;
/* take time stamp for Delay_Req messages only */ /* take time stamp for Delay_Req messages only */
ts_master_en = PTP_TCR_TSMSTRENA; ts_master_en = PTP_TCR_TSMSTRENA;
...@@ -515,8 +514,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -515,8 +514,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
break; break;
/* PTP v2, UDP, any kind of event packet */
case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
/* PTP v2, UDP, any kind of event packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
ptp_v2 = PTP_TCR_TSVER2ENA; ptp_v2 = PTP_TCR_TSVER2ENA;
/* take time stamp for all event messages */ /* take time stamp for all event messages */
...@@ -526,8 +525,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -526,8 +525,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
break; break;
/* PTP v2, UDP, Sync packet */
case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
/* PTP v2, UDP, Sync packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_SYNC; config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_SYNC;
ptp_v2 = PTP_TCR_TSVER2ENA; ptp_v2 = PTP_TCR_TSVER2ENA;
/* take time stamp for SYNC messages only */ /* take time stamp for SYNC messages only */
...@@ -537,8 +536,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -537,8 +536,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
break; break;
/* PTP v2, UDP, Delay_req packet */
case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
/* PTP v2, UDP, Delay_req packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ; config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ;
ptp_v2 = PTP_TCR_TSVER2ENA; ptp_v2 = PTP_TCR_TSVER2ENA;
/* take time stamp for Delay_Req messages only */ /* take time stamp for Delay_Req messages only */
...@@ -549,8 +548,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -549,8 +548,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
break; break;
/* PTP v2/802.AS1, any layer, any kind of event packet */
case HWTSTAMP_FILTER_PTP_V2_EVENT: case HWTSTAMP_FILTER_PTP_V2_EVENT:
/* PTP v2/802.AS1 any layer, any kind of event packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
ptp_v2 = PTP_TCR_TSVER2ENA; ptp_v2 = PTP_TCR_TSVER2ENA;
/* take time stamp for all event messages */ /* take time stamp for all event messages */
...@@ -561,8 +560,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -561,8 +560,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ethernet = PTP_TCR_TSIPENA; ptp_over_ethernet = PTP_TCR_TSIPENA;
break; break;
/* PTP v2/802.AS1, any layer, Sync packet */
case HWTSTAMP_FILTER_PTP_V2_SYNC: case HWTSTAMP_FILTER_PTP_V2_SYNC:
/* PTP v2/802.AS1, any layer, Sync packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC; config.rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC;
ptp_v2 = PTP_TCR_TSVER2ENA; ptp_v2 = PTP_TCR_TSVER2ENA;
/* take time stamp for SYNC messages only */ /* take time stamp for SYNC messages only */
...@@ -573,8 +572,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -573,8 +572,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ethernet = PTP_TCR_TSIPENA; ptp_over_ethernet = PTP_TCR_TSIPENA;
break; break;
/* PTP v2/802.AS1, any layer, Delay_req packet */
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
/* PTP v2/802.AS1, any layer, Delay_req packet */
config.rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ; config.rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ;
ptp_v2 = PTP_TCR_TSVER2ENA; ptp_v2 = PTP_TCR_TSVER2ENA;
/* take time stamp for Delay_Req messages only */ /* take time stamp for Delay_Req messages only */
...@@ -586,8 +585,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -586,8 +585,8 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
ptp_over_ethernet = PTP_TCR_TSIPENA; ptp_over_ethernet = PTP_TCR_TSIPENA;
break; break;
/* time stamp any incoming packet */
case HWTSTAMP_FILTER_ALL: case HWTSTAMP_FILTER_ALL:
/* time stamp any incoming packet */
config.rx_filter = HWTSTAMP_FILTER_ALL; config.rx_filter = HWTSTAMP_FILTER_ALL;
tstamp_all = PTP_TCR_TSENALL; tstamp_all = PTP_TCR_TSENALL;
break; break;
...@@ -632,7 +631,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) ...@@ -632,7 +631,7 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
* 2^x * y == (y << x), hence * 2^x * y == (y << x), hence
* 2^32 * 50000000 ==> (50000000 << 32) * 2^32 * 50000000 ==> (50000000 << 32)
*/ */
temp = (u64)(50000000ULL << 32); temp = (u64) (50000000ULL << 32);
priv->default_addend = div_u64(temp, STMMAC_SYSCLOCK); priv->default_addend = div_u64(temp, STMMAC_SYSCLOCK);
priv->hw->ptp->config_addend(priv->ioaddr, priv->hw->ptp->config_addend(priv->ioaddr,
priv->default_addend); priv->default_addend);
...@@ -665,7 +664,8 @@ static int stmmac_init_ptp(struct stmmac_priv *priv) ...@@ -665,7 +664,8 @@ static int stmmac_init_ptp(struct stmmac_priv *priv)
priv->adv_ts = 0; priv->adv_ts = 0;
} }
if (priv->dma_cap.atime_stamp && priv->extend_desc) { if (priv->dma_cap.atime_stamp && priv->extend_desc) {
pr_debug("IEEE 1588-2008 Advanced Time Stamp supported\n"); pr_debug
("IEEE 1588-2008 Advanced Time Stamp supported\n");
priv->adv_ts = 1; priv->adv_ts = 1;
} }
} }
...@@ -745,8 +745,8 @@ static void stmmac_adjust_link(struct net_device *dev) ...@@ -745,8 +745,8 @@ static void stmmac_adjust_link(struct net_device *dev)
break; break;
default: default:
if (netif_msg_link(priv)) if (netif_msg_link(priv))
pr_warning("%s: Speed (%d) is not 10" pr_warn("%s: Speed (%d) not 10/100\n",
" or 100!\n", dev->name, phydev->speed); dev->name, phydev->speed);
break; break;
} }
...@@ -873,23 +873,23 @@ static int stmmac_init_phy(struct net_device *dev) ...@@ -873,23 +873,23 @@ static int stmmac_init_phy(struct net_device *dev)
static void stmmac_display_ring(void *head, int size, int extend_desc) static void stmmac_display_ring(void *head, int size, int extend_desc)
{ {
int i; int i;
struct dma_extended_desc *ep = (struct dma_extended_desc *) head; struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
struct dma_desc *p = (struct dma_desc *) head; struct dma_desc *p = (struct dma_desc *)head;
for (i = 0; i < size; i++) { for (i = 0; i < size; i++) {
u64 x; u64 x;
if (extend_desc) { if (extend_desc) {
x = *(u64 *) ep; x = *(u64 *) ep;
pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
i, (unsigned int) virt_to_phys(ep), i, (unsigned int)virt_to_phys(ep),
(unsigned int) x, (unsigned int) (x >> 32), (unsigned int)x, (unsigned int)(x >> 32),
ep->basic.des2, ep->basic.des3); ep->basic.des2, ep->basic.des3);
ep++; ep++;
} else { } else {
x = *(u64 *) p; x = *(u64 *) p;
pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x", pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x",
i, (unsigned int) virt_to_phys(p), i, (unsigned int)virt_to_phys(p),
(unsigned int) x, (unsigned int) (x >> 32), (unsigned int)x, (unsigned int)(x >> 32),
p->des2, p->des3); p->des2, p->des3);
p++; p++;
} }
...@@ -904,9 +904,9 @@ static void stmmac_display_rings(struct stmmac_priv *priv) ...@@ -904,9 +904,9 @@ static void stmmac_display_rings(struct stmmac_priv *priv)
if (priv->extend_desc) { if (priv->extend_desc) {
pr_info("Extended RX descriptor ring:\n"); pr_info("Extended RX descriptor ring:\n");
stmmac_display_ring((void *) priv->dma_erx, rxsize, 1); stmmac_display_ring((void *)priv->dma_erx, rxsize, 1);
pr_info("Extended TX descriptor ring:\n"); pr_info("Extended TX descriptor ring:\n");
stmmac_display_ring((void *) priv->dma_etx, txsize, 1); stmmac_display_ring((void *)priv->dma_etx, txsize, 1);
} else { } else {
pr_info("RX descriptor ring:\n"); pr_info("RX descriptor ring:\n");
stmmac_display_ring((void *)priv->dma_rx, rxsize, 0); stmmac_display_ring((void *)priv->dma_rx, rxsize, 0);
...@@ -1006,7 +1006,8 @@ static void init_dma_desc_rings(struct net_device *dev) ...@@ -1006,7 +1006,8 @@ static void init_dma_desc_rings(struct net_device *dev)
unsigned int bfsize = 0; unsigned int bfsize = 0;
/* Set the max buffer size according to the DESC mode /* Set the max buffer size according to the DESC mode
* and the MTU. Note that RING mode allows 16KiB bsize. */ * and the MTU. Note that RING mode allows 16KiB bsize.
*/
if (priv->mode == STMMAC_RING_MODE) if (priv->mode == STMMAC_RING_MODE)
bfsize = priv->hw->ring->set_16kib_bfsize(dev->mtu); bfsize = priv->hw->ring->set_16kib_bfsize(dev->mtu);
...@@ -1154,8 +1155,7 @@ static void free_dma_desc_resources(struct stmmac_priv *priv) ...@@ -1154,8 +1155,7 @@ static void free_dma_desc_resources(struct stmmac_priv *priv)
dma_free_rx_skbufs(priv); dma_free_rx_skbufs(priv);
dma_free_tx_skbufs(priv); dma_free_tx_skbufs(priv);
/* Free the region of consistent memory previously allocated for /* Free DMA regions of consistent memory previously allocated */
* the DMA */
if (!priv->extend_desc) { if (!priv->extend_desc) {
dma_free_coherent(priv->device, dma_free_coherent(priv->device,
priv->dma_tx_size * sizeof(struct dma_desc), priv->dma_tx_size * sizeof(struct dma_desc),
...@@ -1194,8 +1194,7 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv) ...@@ -1194,8 +1194,7 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
* 2) There is no bugged Jumbo frame support * 2) There is no bugged Jumbo frame support
* that needs to not insert csum in the TDES. * that needs to not insert csum in the TDES.
*/ */
priv->hw->dma->dma_mode(priv->ioaddr, priv->hw->dma->dma_mode(priv->ioaddr, SF_DMA_MODE, SF_DMA_MODE);
SF_DMA_MODE, SF_DMA_MODE);
tc = SF_DMA_MODE; tc = SF_DMA_MODE;
} else } else
priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE); priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
...@@ -1221,7 +1220,7 @@ static void stmmac_tx_clean(struct stmmac_priv *priv) ...@@ -1221,7 +1220,7 @@ static void stmmac_tx_clean(struct stmmac_priv *priv)
struct dma_desc *p; struct dma_desc *p;
if (priv->extend_desc) if (priv->extend_desc)
p = (struct dma_desc *) (priv->dma_etx + entry); p = (struct dma_desc *)(priv->dma_etx + entry);
else else
p = priv->dma_tx + entry; p = priv->dma_tx + entry;
...@@ -1293,7 +1292,6 @@ static inline void stmmac_disable_dma_irq(struct stmmac_priv *priv) ...@@ -1293,7 +1292,6 @@ static inline void stmmac_disable_dma_irq(struct stmmac_priv *priv)
priv->hw->dma->disable_dma_irq(priv->ioaddr); priv->hw->dma->disable_dma_irq(priv->ioaddr);
} }
/** /**
* stmmac_tx_err: irq tx error mng function * stmmac_tx_err: irq tx error mng function
* @priv: driver private structure * @priv: driver private structure
...@@ -1378,8 +1376,7 @@ static u32 stmmac_get_synopsys_id(struct stmmac_priv *priv) ...@@ -1378,8 +1376,7 @@ static u32 stmmac_get_synopsys_id(struct stmmac_priv *priv)
{ {
u32 hwid = priv->hw->synopsys_uid; u32 hwid = priv->hw->synopsys_uid;
/* Only check valid Synopsys Id because old MAC chips /* Check Synopsys Id (not available on old chips) */
* have no HW registers where get the ID */
if (likely(hwid)) { if (likely(hwid)) {
u32 uid = ((hwid & 0x0000ff00) >> 8); u32 uid = ((hwid & 0x0000ff00) >> 8);
u32 synid = (hwid & 0x000000ff); u32 synid = (hwid & 0x000000ff);
...@@ -1438,8 +1435,7 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv) ...@@ -1438,8 +1435,7 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv)
priv->dma_cap.mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1; priv->dma_cap.mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
priv->dma_cap.half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2; priv->dma_cap.half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
priv->dma_cap.hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4; priv->dma_cap.hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4;
priv->dma_cap.multi_addr = priv->dma_cap.multi_addr = (hw_cap & DMA_HW_FEAT_ADDMAC) >> 5;
(hw_cap & DMA_HW_FEAT_ADDMACADRSEL) >> 5;
priv->dma_cap.pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6; priv->dma_cap.pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6;
priv->dma_cap.sma_mdio = (hw_cap & DMA_HW_FEAT_SMASEL) >> 8; priv->dma_cap.sma_mdio = (hw_cap & DMA_HW_FEAT_SMASEL) >> 8;
priv->dma_cap.pmt_remote_wake_up = priv->dma_cap.pmt_remote_wake_up =
...@@ -1448,10 +1444,10 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv) ...@@ -1448,10 +1444,10 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv)
(hw_cap & DMA_HW_FEAT_MGKSEL) >> 10; (hw_cap & DMA_HW_FEAT_MGKSEL) >> 10;
/* MMC */ /* MMC */
priv->dma_cap.rmon = (hw_cap & DMA_HW_FEAT_MMCSEL) >> 11; priv->dma_cap.rmon = (hw_cap & DMA_HW_FEAT_MMCSEL) >> 11;
/* IEEE 1588-2002*/ /* IEEE 1588-2002 */
priv->dma_cap.time_stamp = priv->dma_cap.time_stamp =
(hw_cap & DMA_HW_FEAT_TSVER1SEL) >> 12; (hw_cap & DMA_HW_FEAT_TSVER1SEL) >> 12;
/* IEEE 1588-2008*/ /* IEEE 1588-2008 */
priv->dma_cap.atime_stamp = priv->dma_cap.atime_stamp =
(hw_cap & DMA_HW_FEAT_TSVER2SEL) >> 13; (hw_cap & DMA_HW_FEAT_TSVER2SEL) >> 13;
/* 802.3az - Energy-Efficient Ethernet (EEE) */ /* 802.3az - Energy-Efficient Ethernet (EEE) */
...@@ -1470,9 +1466,8 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv) ...@@ -1470,9 +1466,8 @@ static int stmmac_get_hw_features(struct stmmac_priv *priv)
(hw_cap & DMA_HW_FEAT_RXCHCNT) >> 20; (hw_cap & DMA_HW_FEAT_RXCHCNT) >> 20;
priv->dma_cap.number_tx_channel = priv->dma_cap.number_tx_channel =
(hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22; (hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22;
/* Alternate (enhanced) DESC mode*/ /* Alternate (enhanced) DESC mode */
priv->dma_cap.enh_desc = priv->dma_cap.enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
(hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
} }
return hw_cap; return hw_cap;
...@@ -1494,7 +1489,7 @@ static void stmmac_check_ether_addr(struct stmmac_priv *priv) ...@@ -1494,7 +1489,7 @@ static void stmmac_check_ether_addr(struct stmmac_priv *priv)
if (!is_valid_ether_addr(priv->dev->dev_addr)) if (!is_valid_ether_addr(priv->dev->dev_addr))
eth_hw_addr_random(priv->dev); eth_hw_addr_random(priv->dev);
} }
pr_warning("%s: device MAC address %pM\n", priv->dev->name, pr_warn("%s: device MAC address %pM\n", priv->dev->name,
priv->dev->dev_addr); priv->dev->dev_addr);
} }
...@@ -1624,8 +1619,8 @@ static int stmmac_open(struct net_device *dev) ...@@ -1624,8 +1619,8 @@ static int stmmac_open(struct net_device *dev)
ret = request_irq(priv->wol_irq, stmmac_interrupt, ret = request_irq(priv->wol_irq, stmmac_interrupt,
IRQF_SHARED, dev->name, dev); IRQF_SHARED, dev->name, dev);
if (unlikely(ret < 0)) { if (unlikely(ret < 0)) {
pr_err("%s: ERROR: allocating the ext WoL IRQ %d " pr_err("%s: ERROR: allocating the WoL IRQ %d (%d)\n",
"(error: %d)\n", __func__, priv->wol_irq, ret); __func__, priv->wol_irq, ret);
goto open_error_wolirq; goto open_error_wolirq;
} }
} }
...@@ -1660,7 +1655,7 @@ static int stmmac_open(struct net_device *dev) ...@@ -1660,7 +1655,7 @@ static int stmmac_open(struct net_device *dev)
#ifdef CONFIG_STMMAC_DEBUG_FS #ifdef CONFIG_STMMAC_DEBUG_FS
ret = stmmac_init_fs(dev); ret = stmmac_init_fs(dev);
if (ret < 0) if (ret < 0)
pr_warning("%s: failed debugFS registration\n", __func__); pr_warn("%s: failed debugFS registration\n", __func__);
#endif #endif
/* Start the ball rolling... */ /* Start the ball rolling... */
DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name); DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
...@@ -1793,8 +1788,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) ...@@ -1793,8 +1788,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
if (!netif_queue_stopped(dev)) { if (!netif_queue_stopped(dev)) {
netif_stop_queue(dev); netif_stop_queue(dev);
/* This is a hard error, log it. */ /* This is a hard error, log it. */
pr_err("%s: BUG! Tx Ring full when queue awake\n", pr_err("%s: Tx Ring full when queue awake\n", __func__);
__func__);
} }
return NETDEV_TX_BUSY; return NETDEV_TX_BUSY;
} }
...@@ -1808,10 +1802,9 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) ...@@ -1808,10 +1802,9 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
#ifdef STMMAC_XMIT_DEBUG #ifdef STMMAC_XMIT_DEBUG
if ((skb->len > ETH_FRAME_LEN) || nfrags) if ((skb->len > ETH_FRAME_LEN) || nfrags)
pr_debug("stmmac xmit: [entry %d]\n" pr_debug("%s: [entry %d]: skb addr %p len: %d nopagedlen: %d\n"
"\tskb addr %p - len: %d - nopaged_len: %d\n"
"\tn_frags: %d - ip_summed: %d - %s gso\n" "\tn_frags: %d - ip_summed: %d - %s gso\n"
"\ttx_count_frames %d\n", entry, "\ttx_count_frames %d\n", __func__, entry,
skb, skb->len, nopaged_len, nfrags, skb->ip_summed, skb, skb->len, nopaged_len, nfrags, skb->ip_summed,
!skb_is_gso(skb) ? "isn't" : "is", !skb_is_gso(skb) ? "isn't" : "is",
priv->tx_count_frames); priv->tx_count_frames);
...@@ -1820,7 +1813,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) ...@@ -1820,7 +1813,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL); csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
if (priv->extend_desc) if (priv->extend_desc)
desc = (struct dma_desc *) (priv->dma_etx + entry); desc = (struct dma_desc *)(priv->dma_etx + entry);
else else
desc = priv->dma_tx + entry; desc = priv->dma_tx + entry;
...@@ -1863,7 +1856,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) ...@@ -1863,7 +1856,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
entry = (++priv->cur_tx) % txsize; entry = (++priv->cur_tx) % txsize;
if (priv->extend_desc) if (priv->extend_desc)
desc = (struct dma_desc *) (priv->dma_etx + entry); desc = (struct dma_desc *)(priv->dma_etx + entry);
else else
desc = priv->dma_tx + entry; desc = priv->dma_tx + entry;
...@@ -1906,10 +1899,9 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) ...@@ -1906,10 +1899,9 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
#ifdef STMMAC_XMIT_DEBUG #ifdef STMMAC_XMIT_DEBUG
if (netif_msg_pktdata(priv)) { if (netif_msg_pktdata(priv)) {
pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, " pr_info("%s: curr %d dirty=%d entry=%d, first=%p, nfrags=%d"
"first=%p, nfrags=%d\n", __func__, (priv->cur_tx % txsize),
(priv->cur_tx % txsize), (priv->dirty_tx % txsize), (priv->dirty_tx % txsize), entry, first, nfrags);
entry, first, nfrags);
if (priv->extend_desc) if (priv->extend_desc)
stmmac_display_ring((void *)priv->dma_etx, txsize, 1); stmmac_display_ring((void *)priv->dma_etx, txsize, 1);
else else
...@@ -1959,7 +1951,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv) ...@@ -1959,7 +1951,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv)
struct dma_desc *p; struct dma_desc *p;
if (priv->extend_desc) if (priv->extend_desc)
p = (struct dma_desc *) (priv->dma_erx + entry); p = (struct dma_desc *)(priv->dma_erx + entry);
else else
p = priv->dma_rx + entry; p = priv->dma_rx + entry;
...@@ -2001,12 +1993,13 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) ...@@ -2001,12 +1993,13 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
unsigned int entry = priv->cur_rx % rxsize; unsigned int entry = priv->cur_rx % rxsize;
unsigned int next_entry; unsigned int next_entry;
unsigned int count = 0; unsigned int count = 0;
int coe = priv->plat->rx_coe;
#ifdef STMMAC_RX_DEBUG #ifdef STMMAC_RX_DEBUG
if (netif_msg_hw(priv)) { if (netif_msg_hw(priv)) {
pr_debug(">>> stmmac_rx: descriptor ring:\n"); pr_debug(">>> stmmac_rx: descriptor ring:\n");
if (priv->extend_desc) if (priv->extend_desc)
stmmac_display_ring((void *) priv->dma_erx, rxsize, 1); stmmac_display_ring((void *)priv->dma_erx, rxsize, 1);
else else
stmmac_display_ring((void *)priv->dma_rx, rxsize, 0); stmmac_display_ring((void *)priv->dma_rx, rxsize, 0);
} }
...@@ -2016,9 +2009,9 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) ...@@ -2016,9 +2009,9 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
struct dma_desc *p, *p_next; struct dma_desc *p, *p_next;
if (priv->extend_desc) if (priv->extend_desc)
p = (struct dma_desc *) (priv->dma_erx + entry); p = (struct dma_desc *)(priv->dma_erx + entry);
else else
p = priv->dma_rx + entry ; p = priv->dma_rx + entry;
if (priv->hw->desc->get_rx_owner(p)) if (priv->hw->desc->get_rx_owner(p))
break; break;
...@@ -2027,7 +2020,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) ...@@ -2027,7 +2020,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
next_entry = (++priv->cur_rx) % rxsize; next_entry = (++priv->cur_rx) % rxsize;
if (priv->extend_desc) if (priv->extend_desc)
p_next = (struct dma_desc *) (priv->dma_erx + p_next = (struct dma_desc *)(priv->dma_erx +
next_entry); next_entry);
else else
p_next = priv->dma_rx + next_entry; p_next = priv->dma_rx + next_entry;
...@@ -2053,16 +2046,18 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) ...@@ -2053,16 +2046,18 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
priv->rx_skbuff[entry] = NULL; priv->rx_skbuff[entry] = NULL;
dma_unmap_single(priv->device, dma_unmap_single(priv->device,
priv->rx_skbuff_dma[entry], priv->rx_skbuff_dma[entry],
priv->dma_buf_sz, DMA_FROM_DEVICE); priv->dma_buf_sz,
DMA_FROM_DEVICE);
} }
} else { } else {
struct sk_buff *skb; struct sk_buff *skb;
int frame_len; int frame_len;
frame_len = priv->hw->desc->get_rx_frame_len(p, frame_len = priv->hw->desc->get_rx_frame_len(p, coe);
priv->plat->rx_coe);
/* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
* Type frames (LLC/LLC-SNAP) */ * Type frames (LLC/LLC-SNAP)
*/
if (unlikely(status != llc_snap)) if (unlikely(status != llc_snap))
frame_len -= ETH_FCS_LEN; frame_len -= ETH_FCS_LEN;
#ifdef STMMAC_RX_DEBUG #ifdef STMMAC_RX_DEBUG
...@@ -2098,7 +2093,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) ...@@ -2098,7 +2093,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit)
#endif #endif
skb->protocol = eth_type_trans(skb, priv->dev); skb->protocol = eth_type_trans(skb, priv->dev);
if (unlikely(!priv->plat->rx_coe)) if (unlikely(!coe))
skb_checksum_none_assert(skb); skb_checksum_none_assert(skb);
else else
skb->ip_summed = CHECKSUM_UNNECESSARY; skb->ip_summed = CHECKSUM_UNNECESSARY;
...@@ -2166,18 +2161,16 @@ static int stmmac_config(struct net_device *dev, struct ifmap *map) ...@@ -2166,18 +2161,16 @@ static int stmmac_config(struct net_device *dev, struct ifmap *map)
/* Don't allow changing the I/O address */ /* Don't allow changing the I/O address */
if (map->base_addr != dev->base_addr) { if (map->base_addr != dev->base_addr) {
pr_warning("%s: can't change I/O address\n", dev->name); pr_warn("%s: can't change I/O address\n", dev->name);
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
/* Don't allow changing the IRQ */ /* Don't allow changing the IRQ */
if (map->irq != dev->irq) { if (map->irq != dev->irq) {
pr_warning("%s: can't change IRQ number %d\n", pr_warn("%s: not change IRQ number %d\n", dev->name, dev->irq);
dev->name, dev->irq);
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
/* ignore other fields */
return 0; return 0;
} }
...@@ -2251,7 +2244,8 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev, ...@@ -2251,7 +2244,8 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev,
/* Some GMAC devices have a bugged Jumbo frame support that /* Some GMAC devices have a bugged Jumbo frame support that
* needs to have the Tx COE disabled for oversized frames * needs to have the Tx COE disabled for oversized frames
* (due to limited buffer sizes). In this case we disable * (due to limited buffer sizes). In this case we disable
* the TX csum insertionin the TDES and not use SF. */ * the TX csum insertionin the TDES and not use SF.
*/
if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN)) if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
features &= ~NETIF_F_ALL_CSUM; features &= ~NETIF_F_ALL_CSUM;
...@@ -2298,7 +2292,8 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id) ...@@ -2298,7 +2292,8 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
#ifdef CONFIG_NET_POLL_CONTROLLER #ifdef CONFIG_NET_POLL_CONTROLLER
/* Polling receive - used by NETCONSOLE and other diagnostic tools /* Polling receive - used by NETCONSOLE and other diagnostic tools
* to allow network I/O with interrupts disabled. */ * to allow network I/O with interrupts disabled.
*/
static void stmmac_poll_controller(struct net_device *dev) static void stmmac_poll_controller(struct net_device *dev)
{ {
disable_irq(dev->irq); disable_irq(dev->irq);
...@@ -2351,23 +2346,23 @@ static void sysfs_display_ring(void *head, int size, int extend_desc, ...@@ -2351,23 +2346,23 @@ static void sysfs_display_ring(void *head, int size, int extend_desc,
struct seq_file *seq) struct seq_file *seq)
{ {
int i; int i;
struct dma_extended_desc *ep = (struct dma_extended_desc *) head; struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
struct dma_desc *p = (struct dma_desc *) head; struct dma_desc *p = (struct dma_desc *)head;
for (i = 0; i < size; i++) { for (i = 0; i < size; i++) {
u64 x; u64 x;
if (extend_desc) { if (extend_desc) {
x = *(u64 *) ep; x = *(u64 *) ep;
seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
i, (unsigned int) virt_to_phys(ep), i, (unsigned int)virt_to_phys(ep),
(unsigned int) x, (unsigned int) (x >> 32), (unsigned int)x, (unsigned int)(x >> 32),
ep->basic.des2, ep->basic.des3); ep->basic.des2, ep->basic.des3);
ep++; ep++;
} else { } else {
x = *(u64 *) p; x = *(u64 *) p;
seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n", seq_printf(seq, "%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
i, (unsigned int) virt_to_phys(ep), i, (unsigned int)virt_to_phys(ep),
(unsigned int) x, (unsigned int) (x >> 32), (unsigned int)x, (unsigned int)(x >> 32),
p->des2, p->des3); p->des2, p->des3);
p++; p++;
} }
...@@ -2384,9 +2379,9 @@ static int stmmac_sysfs_ring_read(struct seq_file *seq, void *v) ...@@ -2384,9 +2379,9 @@ static int stmmac_sysfs_ring_read(struct seq_file *seq, void *v)
if (priv->extend_desc) { if (priv->extend_desc) {
seq_printf(seq, "Extended RX descriptor ring:\n"); seq_printf(seq, "Extended RX descriptor ring:\n");
sysfs_display_ring((void *) priv->dma_erx, rxsize, 1, seq); sysfs_display_ring((void *)priv->dma_erx, rxsize, 1, seq);
seq_printf(seq, "Extended TX descriptor ring:\n"); seq_printf(seq, "Extended TX descriptor ring:\n");
sysfs_display_ring((void *) priv->dma_etx, txsize, 1, seq); sysfs_display_ring((void *)priv->dma_etx, txsize, 1, seq);
} else { } else {
seq_printf(seq, "RX descriptor ring:\n"); seq_printf(seq, "RX descriptor ring:\n");
sysfs_display_ring((void *)priv->dma_rx, rxsize, 0, seq); sysfs_display_ring((void *)priv->dma_rx, rxsize, 0, seq);
...@@ -2611,11 +2606,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) ...@@ -2611,11 +2606,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv)
} else } else
pr_info(" No HW DMA feature register supported"); pr_info(" No HW DMA feature register supported");
/* Enable the IPC (Checksum Offload) and check if the feature has been
* enabled during the core configuration. */
ret = priv->hw->mac->rx_ipc(priv->ioaddr); ret = priv->hw->mac->rx_ipc(priv->ioaddr);
if (!ret) { if (!ret) {
pr_warning(" RX IPC Checksum Offload not configured.\n"); pr_warn(" RX IPC Checksum Offload not configured.\n");
priv->plat->rx_coe = STMMAC_RX_COE_NONE; priv->plat->rx_coe = STMMAC_RX_COE_NONE;
} }
...@@ -2671,7 +2664,8 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device, ...@@ -2671,7 +2664,8 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
stmmac_verify_args(); stmmac_verify_args();
/* Override with kernel parameters if supplied XXX CRS XXX /* Override with kernel parameters if supplied XXX CRS XXX
* this needs to have multiple instances */ * this needs to have multiple instances
*/
if ((phyaddr >= 0) && (phyaddr <= 31)) if ((phyaddr >= 0) && (phyaddr <= 31))
priv->plat->phy_addr = phyaddr; priv->plat->phy_addr = phyaddr;
...@@ -2718,7 +2712,7 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device, ...@@ -2718,7 +2712,7 @@ struct stmmac_priv *stmmac_dvr_probe(struct device *device,
priv->stmmac_clk = clk_get(priv->device, STMMAC_RESOURCE_NAME); priv->stmmac_clk = clk_get(priv->device, STMMAC_RESOURCE_NAME);
if (IS_ERR(priv->stmmac_clk)) { if (IS_ERR(priv->stmmac_clk)) {
pr_warning("%s: warning: cannot get CSR clock\n", __func__); pr_warn("%s: warning: cannot get CSR clock\n", __func__);
goto error_clk_get; goto error_clk_get;
} }
...@@ -2837,7 +2831,8 @@ int stmmac_resume(struct net_device *ndev) ...@@ -2837,7 +2831,8 @@ int stmmac_resume(struct net_device *ndev)
* automatically as soon as a magic packet or a Wake-up frame * automatically as soon as a magic packet or a Wake-up frame
* is received. Anyway, it's better to manually clear * is received. Anyway, it's better to manually clear
* this bit because it can generate problems while resuming * this bit because it can generate problems while resuming
* from another devices (e.g. serial console). */ * from another devices (e.g. serial console).
*/
if (device_may_wakeup(priv->device)) if (device_may_wakeup(priv->device))
priv->hw->mac->pmt(priv->ioaddr, 0); priv->hw->mac->pmt(priv->ioaddr, 0);
else else
...@@ -2961,7 +2956,7 @@ static int __init stmmac_cmdline_opt(char *str) ...@@ -2961,7 +2956,7 @@ static int __init stmmac_cmdline_opt(char *str)
} }
__setup("stmmaceth=", stmmac_cmdline_opt); __setup("stmmaceth=", stmmac_cmdline_opt);
#endif #endif /* MODULE */
MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet device driver"); MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet device driver");
MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>"); MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
......
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
View file @ ceb69499
...@@ -88,7 +88,7 @@ static int stmmac_pci_probe(struct pci_dev *pdev, ...@@ -88,7 +88,7 @@ static int stmmac_pci_probe(struct pci_dev *pdev,
continue; continue;
addr = pci_iomap(pdev, i, 0); addr = pci_iomap(pdev, i, 0);
if (addr == NULL) { if (addr == NULL) {
pr_err("%s: ERROR: cannot map register memory, aborting", pr_err("%s: ERROR: cannot map register memory aborting",
__func__); __func__);
ret = -EIO; ret = -EIO;
goto err_out_map_failed; goto err_out_map_failed;
......
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