Commit d3751527 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Linus Torvalds

[PATCH] radeonfb iBook & IGP fixes

This patch to radeonfb fixes support for the latest iBook models along
with an initialisation problem on some IGP chipsets. Please apply.
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 49313fb7
...@@ -1144,6 +1144,7 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg ...@@ -1144,6 +1144,7 @@ static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_reg
/* Set PPLL ref. div */ /* Set PPLL ref. div */
if (rinfo->family == CHIP_FAMILY_R300 || if (rinfo->family == CHIP_FAMILY_R300 ||
rinfo->family == CHIP_FAMILY_RS300 ||
rinfo->family == CHIP_FAMILY_R350 || rinfo->family == CHIP_FAMILY_R350 ||
rinfo->family == CHIP_FAMILY_RV350) { rinfo->family == CHIP_FAMILY_RV350) {
if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) {
...@@ -1854,7 +1855,8 @@ static int radeon_set_backlight_enable(int on, int level, void *data) ...@@ -1854,7 +1855,8 @@ static int radeon_set_backlight_enable(int on, int level, void *data)
rinfo->family == CHIP_FAMILY_RV280 || rinfo->family == CHIP_FAMILY_RV280 ||
rinfo->family == CHIP_FAMILY_RV350) && rinfo->family == CHIP_FAMILY_RV350) &&
!machine_is_compatible("PowerBook4,3") && !machine_is_compatible("PowerBook4,3") &&
!machine_is_compatible("PowerBook6,3")) !machine_is_compatible("PowerBook6,3") &&
!machine_is_compatible("PowerBook6,5"))
conv_table = backlight_conv_m7; conv_table = backlight_conv_m7;
else else
conv_table = backlight_conv_m6; conv_table = backlight_conv_m6;
...@@ -2128,7 +2130,31 @@ static int radeonfb_pci_register (struct pci_dev *pdev, ...@@ -2128,7 +2130,31 @@ static int radeonfb_pci_register (struct pci_dev *pdev,
#endif /* CONFIG_PPC_OF */ #endif /* CONFIG_PPC_OF */
/* framebuffer size */ /* framebuffer size */
tmp = INREG(CONFIG_MEMSIZE); if ((rinfo->family == CHIP_FAMILY_RS100) ||
(rinfo->family == CHIP_FAMILY_RS200) ||
(rinfo->family == CHIP_FAMILY_RS300)) {
u32 tom = INREG(NB_TOM);
tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
OUTREG(MC_FB_LOCATION, tom);
OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16);
/* This is supposed to fix the crtc2 noise problem. */
OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);
if ((rinfo->family == CHIP_FAMILY_RS100) ||
(rinfo->family == CHIP_FAMILY_RS200)) {
/* This is to workaround the asic bug for RMX, some versions
of BIOS dosen't have this register initialized correctly.
*/
OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN,
~CRTC_H_CUTOFF_ACTIVE_EN);
}
} else {
tmp = INREG(CONFIG_MEMSIZE);
}
/* mem size is bits [28:0], mask off the rest */ /* mem size is bits [28:0], mask off the rest */
rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK; rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK;
......
...@@ -653,7 +653,8 @@ static void radeon_fixup_panel_info(struct radeonfb_info *rinfo) ...@@ -653,7 +653,8 @@ static void radeon_fixup_panel_info(struct radeonfb_info *rinfo)
rinfo->panel_info.use_bios_dividers = 1; rinfo->panel_info.use_bios_dividers = 1;
} }
/* iBook G4 */ /* iBook G4 */
if (machine_is_compatible("PowerBook6,3")) { if (machine_is_compatible("PowerBook6,3") |
machine_is_compatible("PowerBook6,5")) {
rinfo->panel_info.ref_divider = rinfo->pll.ref_div; rinfo->panel_info.ref_divider = rinfo->pll.ref_div;
rinfo->panel_info.post_divider = 0x6; rinfo->panel_info.post_divider = 0x6;
rinfo->panel_info.fbk_divider = 0xad; rinfo->panel_info.fbk_divider = 0xad;
......
...@@ -173,6 +173,8 @@ ...@@ -173,6 +173,8 @@
#define CUR_CLR1 0x0270 #define CUR_CLR1 0x0270
#define FP_HORZ_VERT_ACTIVE 0x0278 #define FP_HORZ_VERT_ACTIVE 0x0278
#define CRTC_MORE_CNTL 0x027C #define CRTC_MORE_CNTL 0x027C
#define CRTC_H_CUTOFF_ACTIVE_EN (1<<4)
#define CRTC_V_CUTOFF_ACTIVE_EN (1<<5)
#define DAC_EXT_CNTL 0x0280 #define DAC_EXT_CNTL 0x0280
#define FP_GEN_CNTL 0x0284 #define FP_GEN_CNTL 0x0284
#define FP_HORZ_STRETCH 0x028C #define FP_HORZ_STRETCH 0x028C
...@@ -185,6 +187,7 @@ ...@@ -185,6 +187,7 @@
//#define DDA_ON_OFF 0x02e4 //#define DDA_ON_OFF 0x02e4
#define DVI_I2C_CNTL_1 0x02e4 #define DVI_I2C_CNTL_1 0x02e4
#define GRPH_BUFFER_CNTL 0x02F0 #define GRPH_BUFFER_CNTL 0x02F0
#define GRPH2_BUFFER_CNTL 0x03F0
#define VGA_BUFFER_CNTL 0x02F4 #define VGA_BUFFER_CNTL 0x02F4
#define OV0_Y_X_START 0x0400 #define OV0_Y_X_START 0x0400
#define OV0_Y_X_END 0x0404 #define OV0_Y_X_END 0x0404
...@@ -1944,7 +1947,7 @@ ...@@ -1944,7 +1947,7 @@
#define ixREG_COLLAR_WRITE 0x0013 #define ixREG_COLLAR_WRITE 0x0013
#define ixREG_COLLAR_READ 0x0014 #define ixREG_COLLAR_READ 0x0014
#define NB_TOM 0x15C
#endif /* _RADEON_H */ #endif /* _RADEON_H */
......
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