qed: reformat public_port::transceiver_data a bit

Prior to adding new bitfields, reformat the existing ones from spaces
to tabs, and unify all hex values to lowercase.
Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

drivers/net/ethernet/qlogic/qed/qed_hsi.h

@@ -11973,18 +11973,19 @@ struct public_port {
 	struct dcbx_mib operational_dcbx_mib;
 
 	u32 reserved[2];
+
 	u32						transceiver_data;
-#define ETH_TRANSCEIVER_STATE_MASK	0x000000FF
+#define ETH_TRANSCEIVER_STATE_MASK			0x000000ff
 #define ETH_TRANSCEIVER_STATE_SHIFT			0x00000000
 #define ETH_TRANSCEIVER_STATE_OFFSET			0x00000000
 #define ETH_TRANSCEIVER_STATE_UNPLUGGED			0x00000000
 #define ETH_TRANSCEIVER_STATE_PRESENT			0x00000001
 #define ETH_TRANSCEIVER_STATE_VALID			0x00000003
 #define ETH_TRANSCEIVER_STATE_UPDATING			0x00000008
-#define ETH_TRANSCEIVER_TYPE_MASK       0x0000FF00
+#define ETH_TRANSCEIVER_TYPE_MASK			0x0000ff00
 #define ETH_TRANSCEIVER_TYPE_OFFSET			0x8
 #define ETH_TRANSCEIVER_TYPE_NONE			0x00
-#define ETH_TRANSCEIVER_TYPE_UNKNOWN                    0xFF
+#define ETH_TRANSCEIVER_TYPE_UNKNOWN			0xff
 #define ETH_TRANSCEIVER_TYPE_1G_PCC			0x01
 #define ETH_TRANSCEIVER_TYPE_1G_ACC			0x02
 #define ETH_TRANSCEIVER_TYPE_1G_LX			0x03
@@ -12026,6 +12027,7 @@ struct public_port {
 #define ETH_TRANSCEIVER_TYPE_MULTI_RATE_40G_100G_CR	0x34
 #define ETH_TRANSCEIVER_TYPE_MULTI_RATE_40G_100G_LR	0x35
 #define ETH_TRANSCEIVER_TYPE_MULTI_RATE_40G_100G_AOC	0x36
+
 	u32 wol_info;
 	u32 wol_pkt_len;
 	u32 wol_pkt_details;