Commit d5b1d8cd authored by David S. Miller's avatar David S. Miller
parents 5d6bcdfe ebe42d16
...@@ -214,9 +214,6 @@ struct e1000_rx_ring { ...@@ -214,9 +214,6 @@ struct e1000_rx_ring {
/* board specific private data structure */ /* board specific private data structure */
struct e1000_adapter { struct e1000_adapter {
struct timer_list tx_fifo_stall_timer;
struct timer_list watchdog_timer;
struct timer_list phy_info_timer;
unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
u16 mng_vlan_id; u16 mng_vlan_id;
u32 bd_number; u32 bd_number;
...@@ -237,7 +234,6 @@ struct e1000_adapter { ...@@ -237,7 +234,6 @@ struct e1000_adapter {
u16 tx_itr; u16 tx_itr;
u16 rx_itr; u16 rx_itr;
struct work_struct reset_task;
u8 fc_autoneg; u8 fc_autoneg;
/* TX */ /* TX */
...@@ -310,8 +306,12 @@ struct e1000_adapter { ...@@ -310,8 +306,12 @@ struct e1000_adapter {
bool discarding; bool discarding;
struct work_struct fifo_stall_task; struct work_struct reset_task;
struct work_struct phy_info_task; struct delayed_work watchdog_task;
struct delayed_work fifo_stall_task;
struct delayed_work phy_info_task;
struct mutex mutex;
}; };
enum e1000_state_t { enum e1000_state_t {
......
...@@ -5385,7 +5385,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up) ...@@ -5385,7 +5385,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
if (ret_val) if (ret_val)
return ret_val; return ret_val;
mdelay(20); msleep(20);
ret_val = e1000_write_phy_reg(hw, 0x0000, ret_val = e1000_write_phy_reg(hw, 0x0000,
IGP01E1000_IEEE_FORCE_GIGA); IGP01E1000_IEEE_FORCE_GIGA);
...@@ -5413,7 +5413,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up) ...@@ -5413,7 +5413,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
if (ret_val) if (ret_val)
return ret_val; return ret_val;
mdelay(20); msleep(20);
/* Now enable the transmitter */ /* Now enable the transmitter */
ret_val = ret_val =
...@@ -5440,7 +5440,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up) ...@@ -5440,7 +5440,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
if (ret_val) if (ret_val)
return ret_val; return ret_val;
mdelay(20); msleep(20);
ret_val = e1000_write_phy_reg(hw, 0x0000, ret_val = e1000_write_phy_reg(hw, 0x0000,
IGP01E1000_IEEE_FORCE_GIGA); IGP01E1000_IEEE_FORCE_GIGA);
...@@ -5457,7 +5457,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up) ...@@ -5457,7 +5457,7 @@ static s32 e1000_config_dsp_after_link_change(struct e1000_hw *hw, bool link_up)
if (ret_val) if (ret_val)
return ret_val; return ret_val;
mdelay(20); msleep(20);
/* Now enable the transmitter */ /* Now enable the transmitter */
ret_val = ret_val =
...@@ -5750,26 +5750,26 @@ static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw) ...@@ -5750,26 +5750,26 @@ static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw)
if ((mii_status_reg & ~MII_SR_LINK_STATUS) == 0) if ((mii_status_reg & ~MII_SR_LINK_STATUS) == 0)
break; break;
mdelay(100); msleep(100);
} }
/* Recommended delay time after link has been lost */ /* Recommended delay time after link has been lost */
mdelay(1000); msleep(1000);
/* Now we will re-enable th transmitter on the PHY */ /* Now we will re-enable th transmitter on the PHY */
ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019); ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019);
if (ret_val) if (ret_val)
return ret_val; return ret_val;
mdelay(50); msleep(50);
ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0); ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0);
if (ret_val) if (ret_val)
return ret_val; return ret_val;
mdelay(50); msleep(50);
ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00); ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00);
if (ret_val) if (ret_val)
return ret_val; return ret_val;
mdelay(50); msleep(50);
ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000); ret_val = e1000_write_phy_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000);
if (ret_val) if (ret_val)
return ret_val; return ret_val;
...@@ -5794,7 +5794,7 @@ static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw) ...@@ -5794,7 +5794,7 @@ static s32 e1000_polarity_reversal_workaround(struct e1000_hw *hw)
if (mii_status_reg & MII_SR_LINK_STATUS) if (mii_status_reg & MII_SR_LINK_STATUS)
break; break;
mdelay(100); msleep(100);
} }
return E1000_SUCCESS; return E1000_SUCCESS;
} }
...@@ -5825,6 +5825,6 @@ static s32 e1000_get_auto_rd_done(struct e1000_hw *hw) ...@@ -5825,6 +5825,6 @@ static s32 e1000_get_auto_rd_done(struct e1000_hw *hw)
static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw) static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw)
{ {
e_dbg("e1000_get_phy_cfg_done"); e_dbg("e1000_get_phy_cfg_done");
mdelay(10); msleep(10);
return E1000_SUCCESS; return E1000_SUCCESS;
} }
...@@ -1578,7 +1578,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable) ...@@ -1578,7 +1578,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
ret_val = e1e_wphy(hw, PHY_REG(776, 20), data); ret_val = e1e_wphy(hw, PHY_REG(776, 20), data);
if (ret_val) if (ret_val)
goto out; goto out;
ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0xFE00); ret_val = e1e_wphy(hw, PHY_REG(776, 23), 0xF100);
if (ret_val) if (ret_val)
goto out; goto out;
e1e_rphy(hw, HV_PM_CTRL, &data); e1e_rphy(hw, HV_PM_CTRL, &data);
......
...@@ -130,7 +130,9 @@ union e1000_adv_tx_desc { ...@@ -130,7 +130,9 @@ union e1000_adv_tx_desc {
#define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp packet */ #define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp packet */
#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */ #define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ #define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
#define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
#define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */ #define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
#define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */ #define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */
#define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */ #define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */ #define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
......
...@@ -47,6 +47,7 @@ struct igb_adapter; ...@@ -47,6 +47,7 @@ struct igb_adapter;
/* TX/RX descriptor defines */ /* TX/RX descriptor defines */
#define IGB_DEFAULT_TXD 256 #define IGB_DEFAULT_TXD 256
#define IGB_DEFAULT_TX_WORK 128
#define IGB_MIN_TXD 80 #define IGB_MIN_TXD 80
#define IGB_MAX_TXD 4096 #define IGB_MAX_TXD 4096
...@@ -129,29 +130,33 @@ struct vf_data_storage { ...@@ -129,29 +130,33 @@ struct vf_data_storage {
#define IGB_MNG_VLAN_NONE -1 #define IGB_MNG_VLAN_NONE -1
#define IGB_TX_FLAGS_CSUM 0x00000001
#define IGB_TX_FLAGS_VLAN 0x00000002
#define IGB_TX_FLAGS_TSO 0x00000004
#define IGB_TX_FLAGS_IPV4 0x00000008
#define IGB_TX_FLAGS_TSTAMP 0x00000010
#define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
#define IGB_TX_FLAGS_VLAN_SHIFT 16
/* wrapper around a pointer to a socket buffer, /* wrapper around a pointer to a socket buffer,
* so a DMA handle can be stored along with the buffer */ * so a DMA handle can be stored along with the buffer */
struct igb_buffer { struct igb_tx_buffer {
struct sk_buff *skb; union e1000_adv_tx_desc *next_to_watch;
dma_addr_t dma;
union {
/* TX */
struct {
unsigned long time_stamp; unsigned long time_stamp;
u16 length; struct sk_buff *skb;
u16 next_to_watch;
unsigned int bytecount; unsigned int bytecount;
u16 gso_segs; u16 gso_segs;
u8 tx_flags; dma_addr_t dma;
u8 mapped_as_page; u32 length;
}; u32 tx_flags;
/* RX */ };
struct {
struct igb_rx_buffer {
struct sk_buff *skb;
dma_addr_t dma;
struct page *page; struct page *page;
dma_addr_t page_dma; dma_addr_t page_dma;
u16 page_offset; u32 page_offset;
};
};
}; };
struct igb_tx_queue_stats { struct igb_tx_queue_stats {
...@@ -177,6 +182,7 @@ struct igb_q_vector { ...@@ -177,6 +182,7 @@ struct igb_q_vector {
u32 eims_value; u32 eims_value;
u16 cpu; u16 cpu;
u16 tx_work_limit;
u16 itr_val; u16 itr_val;
u8 set_itr; u8 set_itr;
...@@ -189,7 +195,10 @@ struct igb_ring { ...@@ -189,7 +195,10 @@ struct igb_ring {
struct igb_q_vector *q_vector; /* backlink to q_vector */ struct igb_q_vector *q_vector; /* backlink to q_vector */
struct net_device *netdev; /* back pointer to net_device */ struct net_device *netdev; /* back pointer to net_device */
struct device *dev; /* device pointer for dma mapping */ struct device *dev; /* device pointer for dma mapping */
struct igb_buffer *buffer_info; /* array of buffer info structs */ union { /* array of buffer info structs */
struct igb_tx_buffer *tx_buffer_info;
struct igb_rx_buffer *rx_buffer_info;
};
void *desc; /* descriptor ring memory */ void *desc; /* descriptor ring memory */
unsigned long flags; /* ring specific flags */ unsigned long flags; /* ring specific flags */
void __iomem *tail; /* pointer to ring tail register */ void __iomem *tail; /* pointer to ring tail register */
...@@ -229,7 +238,7 @@ struct igb_ring { ...@@ -229,7 +238,7 @@ struct igb_ring {
#define IGB_RING_FLAG_TX_CTX_IDX 0x00000001 /* HW requires context index */ #define IGB_RING_FLAG_TX_CTX_IDX 0x00000001 /* HW requires context index */
#define IGB_ADVTXD_DCMD (E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS) #define IGB_TXD_DCMD (E1000_ADVTXD_DCMD_EOP | E1000_ADVTXD_DCMD_RS)
#define IGB_RX_DESC(R, i) \ #define IGB_RX_DESC(R, i) \
(&(((union e1000_adv_rx_desc *)((R)->desc))[i])) (&(((union e1000_adv_rx_desc *)((R)->desc))[i]))
...@@ -266,6 +275,7 @@ struct igb_adapter { ...@@ -266,6 +275,7 @@ struct igb_adapter {
u16 rx_itr; u16 rx_itr;
/* TX */ /* TX */
u16 tx_work_limit;
u32 tx_timeout_count; u32 tx_timeout_count;
int num_tx_queues; int num_tx_queues;
struct igb_ring *tx_ring[16]; struct igb_ring *tx_ring[16];
...@@ -374,7 +384,7 @@ extern void igb_setup_tctl(struct igb_adapter *); ...@@ -374,7 +384,7 @@ extern void igb_setup_tctl(struct igb_adapter *);
extern void igb_setup_rctl(struct igb_adapter *); extern void igb_setup_rctl(struct igb_adapter *);
extern netdev_tx_t igb_xmit_frame_ring(struct sk_buff *, struct igb_ring *); extern netdev_tx_t igb_xmit_frame_ring(struct sk_buff *, struct igb_ring *);
extern void igb_unmap_and_free_tx_resource(struct igb_ring *, extern void igb_unmap_and_free_tx_resource(struct igb_ring *,
struct igb_buffer *); struct igb_tx_buffer *);
extern void igb_alloc_rx_buffers(struct igb_ring *, u16); extern void igb_alloc_rx_buffers(struct igb_ring *, u16);
extern void igb_update_stats(struct igb_adapter *, struct rtnl_link_stats64 *); extern void igb_update_stats(struct igb_adapter *, struct rtnl_link_stats64 *);
extern bool igb_has_link(struct igb_adapter *adapter); extern bool igb_has_link(struct igb_adapter *adapter);
......
...@@ -1579,7 +1579,8 @@ static int igb_clean_test_rings(struct igb_ring *rx_ring, ...@@ -1579,7 +1579,8 @@ static int igb_clean_test_rings(struct igb_ring *rx_ring,
unsigned int size) unsigned int size)
{ {
union e1000_adv_rx_desc *rx_desc; union e1000_adv_rx_desc *rx_desc;
struct igb_buffer *buffer_info; struct igb_rx_buffer *rx_buffer_info;
struct igb_tx_buffer *tx_buffer_info;
int rx_ntc, tx_ntc, count = 0; int rx_ntc, tx_ntc, count = 0;
u32 staterr; u32 staterr;
...@@ -1591,22 +1592,22 @@ static int igb_clean_test_rings(struct igb_ring *rx_ring, ...@@ -1591,22 +1592,22 @@ static int igb_clean_test_rings(struct igb_ring *rx_ring,
while (staterr & E1000_RXD_STAT_DD) { while (staterr & E1000_RXD_STAT_DD) {
/* check rx buffer */ /* check rx buffer */
buffer_info = &rx_ring->buffer_info[rx_ntc]; rx_buffer_info = &rx_ring->rx_buffer_info[rx_ntc];
/* unmap rx buffer, will be remapped by alloc_rx_buffers */ /* unmap rx buffer, will be remapped by alloc_rx_buffers */
dma_unmap_single(rx_ring->dev, dma_unmap_single(rx_ring->dev,
buffer_info->dma, rx_buffer_info->dma,
IGB_RX_HDR_LEN, IGB_RX_HDR_LEN,
DMA_FROM_DEVICE); DMA_FROM_DEVICE);
buffer_info->dma = 0; rx_buffer_info->dma = 0;
/* verify contents of skb */ /* verify contents of skb */
if (!igb_check_lbtest_frame(buffer_info->skb, size)) if (!igb_check_lbtest_frame(rx_buffer_info->skb, size))
count++; count++;
/* unmap buffer on tx side */ /* unmap buffer on tx side */
buffer_info = &tx_ring->buffer_info[tx_ntc]; tx_buffer_info = &tx_ring->tx_buffer_info[tx_ntc];
igb_unmap_and_free_tx_resource(tx_ring, buffer_info); igb_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
/* increment rx/tx next to clean counters */ /* increment rx/tx next to clean counters */
rx_ntc++; rx_ntc++;
...@@ -2011,6 +2012,7 @@ static int igb_set_coalesce(struct net_device *netdev, ...@@ -2011,6 +2012,7 @@ static int igb_set_coalesce(struct net_device *netdev,
for (i = 0; i < adapter->num_q_vectors; i++) { for (i = 0; i < adapter->num_q_vectors; i++) {
struct igb_q_vector *q_vector = adapter->q_vector[i]; struct igb_q_vector *q_vector = adapter->q_vector[i];
q_vector->tx_work_limit = adapter->tx_work_limit;
if (q_vector->rx_ring) if (q_vector->rx_ring)
q_vector->itr_val = adapter->rx_itr_setting; q_vector->itr_val = adapter->rx_itr_setting;
else else
......
This diff is collapsed.
...@@ -56,8 +56,8 @@ char ixgbe_driver_name[] = "ixgbe"; ...@@ -56,8 +56,8 @@ char ixgbe_driver_name[] = "ixgbe";
static const char ixgbe_driver_string[] = static const char ixgbe_driver_string[] =
"Intel(R) 10 Gigabit PCI Express Network Driver"; "Intel(R) 10 Gigabit PCI Express Network Driver";
#define MAJ 3 #define MAJ 3
#define MIN 4 #define MIN 6
#define BUILD 8 #define BUILD 7
#define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \ #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
__stringify(BUILD) "-k" __stringify(BUILD) "-k"
const char ixgbe_driver_version[] = DRV_VERSION; const char ixgbe_driver_version[] = DRV_VERSION;
......
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