Commit e1214b95 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Populate output_types from .get_config()

Rather than having the caller of .get_config() set output_types based on
encoder->type, let's just have .get_config() itself populate
output_types. This way we are isolated from encoder->type, which won't
be useable for this purpose anyway soon (at least for DDI encoders).

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171027193128.14483-2-ville.syrjala@linux.intel.comReviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
parent d6038611
...@@ -119,6 +119,8 @@ static unsigned int intel_crt_get_flags(struct intel_encoder *encoder) ...@@ -119,6 +119,8 @@ static unsigned int intel_crt_get_flags(struct intel_encoder *encoder)
static void intel_crt_get_config(struct intel_encoder *encoder, static void intel_crt_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config) struct intel_crtc_state *pipe_config)
{ {
pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG);
pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder); pipe_config->base.adjusted_mode.flags |= intel_crt_get_flags(encoder);
pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
......
...@@ -2595,12 +2595,23 @@ void intel_ddi_get_config(struct intel_encoder *encoder, ...@@ -2595,12 +2595,23 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
pipe_config->hdmi_high_tmds_clock_ratio = true; pipe_config->hdmi_high_tmds_clock_ratio = true;
/* fall through */ /* fall through */
case TRANS_DDI_MODE_SELECT_DVI: case TRANS_DDI_MODE_SELECT_DVI:
pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI);
pipe_config->lane_count = 4; pipe_config->lane_count = 4;
break; break;
case TRANS_DDI_MODE_SELECT_FDI: case TRANS_DDI_MODE_SELECT_FDI:
pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG);
break; break;
case TRANS_DDI_MODE_SELECT_DP_SST: case TRANS_DDI_MODE_SELECT_DP_SST:
if (encoder->type == INTEL_OUTPUT_EDP)
pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP);
else
pipe_config->output_types |= BIT(INTEL_OUTPUT_DP);
pipe_config->lane_count =
((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
intel_dp_get_m_n(intel_crtc, pipe_config);
break;
case TRANS_DDI_MODE_SELECT_DP_MST: case TRANS_DDI_MODE_SELECT_DP_MST:
pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST);
pipe_config->lane_count = pipe_config->lane_count =
((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1; ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
intel_dp_get_m_n(intel_crtc, pipe_config); intel_dp_get_m_n(intel_crtc, pipe_config);
......
...@@ -11562,10 +11562,8 @@ verify_crtc_state(struct drm_crtc *crtc, ...@@ -11562,10 +11562,8 @@ verify_crtc_state(struct drm_crtc *crtc,
"Encoder connected to wrong pipe %c\n", "Encoder connected to wrong pipe %c\n",
pipe_name(pipe)); pipe_name(pipe));
if (active) { if (active)
pipe_config->output_types |= 1 << encoder->type;
encoder->get_config(encoder, pipe_config); encoder->get_config(encoder, pipe_config);
}
} }
intel_crtc_compute_pixel_rate(pipe_config); intel_crtc_compute_pixel_rate(pipe_config);
...@@ -14960,7 +14958,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) ...@@ -14960,7 +14958,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
crtc_state = to_intel_crtc_state(crtc->base.state); crtc_state = to_intel_crtc_state(crtc->base.state);
encoder->base.crtc = &crtc->base; encoder->base.crtc = &crtc->base;
crtc_state->output_types |= 1 << encoder->type;
encoder->get_config(encoder, crtc_state); encoder->get_config(encoder, crtc_state);
} else { } else {
encoder->base.crtc = NULL; encoder->base.crtc = NULL;
......
...@@ -2621,6 +2621,11 @@ static void intel_dp_get_config(struct intel_encoder *encoder, ...@@ -2621,6 +2621,11 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
enum port port = dp_to_dig_port(intel_dp)->port; enum port port = dp_to_dig_port(intel_dp)->port;
struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
if (encoder->type == INTEL_OUTPUT_EDP)
pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP);
else
pipe_config->output_types |= BIT(INTEL_OUTPUT_DP);
tmp = I915_READ(intel_dp->output_reg); tmp = I915_READ(intel_dp->output_reg);
pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A; pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;
......
...@@ -291,6 +291,8 @@ static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, ...@@ -291,6 +291,8 @@ static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
u32 temp, flags = 0; u32 temp, flags = 0;
pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST);
pipe_config->has_audio = pipe_config->has_audio =
intel_ddi_is_audio_enabled(dev_priv, crtc); intel_ddi_is_audio_enabled(dev_priv, crtc);
......
...@@ -1243,6 +1243,8 @@ static void intel_dsi_get_config(struct intel_encoder *encoder, ...@@ -1243,6 +1243,8 @@ static void intel_dsi_get_config(struct intel_encoder *encoder,
u32 pclk; u32 pclk;
DRM_DEBUG_KMS("\n"); DRM_DEBUG_KMS("\n");
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
if (IS_GEN9_LP(dev_priv)) if (IS_GEN9_LP(dev_priv))
bxt_dsi_get_pipe_config(encoder, pipe_config); bxt_dsi_get_pipe_config(encoder, pipe_config);
......
...@@ -159,6 +159,8 @@ static void intel_dvo_get_config(struct intel_encoder *encoder, ...@@ -159,6 +159,8 @@ static void intel_dvo_get_config(struct intel_encoder *encoder,
struct intel_dvo *intel_dvo = enc_to_dvo(encoder); struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
u32 tmp, flags = 0; u32 tmp, flags = 0;
pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
tmp = I915_READ(intel_dvo->dev.dvo_reg); tmp = I915_READ(intel_dvo->dev.dvo_reg);
if (tmp & DVO_HSYNC_ACTIVE_HIGH) if (tmp & DVO_HSYNC_ACTIVE_HIGH)
flags |= DRM_MODE_FLAG_PHSYNC; flags |= DRM_MODE_FLAG_PHSYNC;
......
...@@ -957,6 +957,8 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder, ...@@ -957,6 +957,8 @@ static void intel_hdmi_get_config(struct intel_encoder *encoder,
u32 tmp, flags = 0; u32 tmp, flags = 0;
int dotclock; int dotclock;
pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI);
tmp = I915_READ(intel_hdmi->hdmi_reg); tmp = I915_READ(intel_hdmi->hdmi_reg);
if (tmp & SDVO_HSYNC_ACTIVE_HIGH) if (tmp & SDVO_HSYNC_ACTIVE_HIGH)
......
...@@ -125,6 +125,8 @@ static void intel_lvds_get_config(struct intel_encoder *encoder, ...@@ -125,6 +125,8 @@ static void intel_lvds_get_config(struct intel_encoder *encoder,
struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base); struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
u32 tmp, flags = 0; u32 tmp, flags = 0;
pipe_config->output_types |= BIT(INTEL_OUTPUT_LVDS);
tmp = I915_READ(lvds_encoder->reg); tmp = I915_READ(lvds_encoder->reg);
if (tmp & LVDS_HSYNC_POLARITY) if (tmp & LVDS_HSYNC_POLARITY)
flags |= DRM_MODE_FLAG_NHSYNC; flags |= DRM_MODE_FLAG_NHSYNC;
......
...@@ -1429,6 +1429,8 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder, ...@@ -1429,6 +1429,8 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
u8 val; u8 val;
bool ret; bool ret;
pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
sdvox = I915_READ(intel_sdvo->sdvo_reg); sdvox = I915_READ(intel_sdvo->sdvo_reg);
ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
......
...@@ -868,6 +868,8 @@ static void ...@@ -868,6 +868,8 @@ static void
intel_tv_get_config(struct intel_encoder *encoder, intel_tv_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config) struct intel_crtc_state *pipe_config)
{ {
pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT);
pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock; pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
} }
......
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