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Commit e2a2e263 authored by Russell King's avatar Russell King Committed by Lucas Stach
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drm/etnaviv: update common and state_hi xml.h files 

Update the common and state_hi xml.h header files from the etnaviv
repository.
Acked-by: default avatarChristian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
parent b98c6688
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Showing with 75 additions and 10 deletions
drivers/gpu/drm/etnaviv/common.xml.h
View file @ e2a2e263
...@@ -8,8 +8,8 @@ This file was generated by the rules-ng-ng headergen tool in this git repository ...@@ -8,8 +8,8 @@ This file was generated by the rules-ng-ng headergen tool in this git repository
git clone git://0x04.net/rules-ng-ng git clone git://0x04.net/rules-ng-ng
The rules-ng-ng source files this header was generated from are: The rules-ng-ng source files this header was generated from are:
- state_vg.xml ( 5973 bytes, from 2015-03-25 11:26:01) - state_hi.xml ( 24309 bytes, from 2015-12-12 09:02:53)
- common.xml ( 18437 bytes, from 2015-03-25 11:27:41) - common.xml ( 18379 bytes, from 2015-12-12 09:02:53)
Copyright (C) 2015 Copyright (C) 2015
*/ */
...@@ -30,15 +30,19 @@ Copyright (C) 2015 ...@@ -30,15 +30,19 @@ Copyright (C) 2015
#define ENDIAN_MODE_NO_SWAP 0x00000000 #define ENDIAN_MODE_NO_SWAP 0x00000000
#define ENDIAN_MODE_SWAP_16 0x00000001 #define ENDIAN_MODE_SWAP_16 0x00000001
#define ENDIAN_MODE_SWAP_32 0x00000002 #define ENDIAN_MODE_SWAP_32 0x00000002
#define chipModel_GC200 0x00000200
#define chipModel_GC300 0x00000300 #define chipModel_GC300 0x00000300
#define chipModel_GC320 0x00000320 #define chipModel_GC320 0x00000320
#define chipModel_GC328 0x00000328
#define chipModel_GC350 0x00000350 #define chipModel_GC350 0x00000350
#define chipModel_GC355 0x00000355 #define chipModel_GC355 0x00000355
#define chipModel_GC400 0x00000400 #define chipModel_GC400 0x00000400
#define chipModel_GC410 0x00000410 #define chipModel_GC410 0x00000410
#define chipModel_GC420 0x00000420 #define chipModel_GC420 0x00000420
#define chipModel_GC428 0x00000428
#define chipModel_GC450 0x00000450 #define chipModel_GC450 0x00000450
#define chipModel_GC500 0x00000500 #define chipModel_GC500 0x00000500
#define chipModel_GC520 0x00000520
#define chipModel_GC530 0x00000530 #define chipModel_GC530 0x00000530
#define chipModel_GC600 0x00000600 #define chipModel_GC600 0x00000600
#define chipModel_GC700 0x00000700 #define chipModel_GC700 0x00000700
...@@ -46,9 +50,16 @@ Copyright (C) 2015 ...@@ -46,9 +50,16 @@ Copyright (C) 2015
#define chipModel_GC860 0x00000860 #define chipModel_GC860 0x00000860
#define chipModel_GC880 0x00000880 #define chipModel_GC880 0x00000880
#define chipModel_GC1000 0x00001000 #define chipModel_GC1000 0x00001000
#define chipModel_GC1500 0x00001500
#define chipModel_GC2000 0x00002000 #define chipModel_GC2000 0x00002000
#define chipModel_GC2100 0x00002100 #define chipModel_GC2100 0x00002100
#define chipModel_GC2200 0x00002200
#define chipModel_GC2500 0x00002500
#define chipModel_GC3000 0x00003000
#define chipModel_GC4000 0x00004000 #define chipModel_GC4000 0x00004000
#define chipModel_GC5000 0x00005000
#define chipModel_GC5200 0x00005200
#define chipModel_GC6400 0x00006400
#define RGBA_BITS_R 0x00000001 #define RGBA_BITS_R 0x00000001
#define RGBA_BITS_G 0x00000002 #define RGBA_BITS_G 0x00000002
#define RGBA_BITS_B 0x00000004 #define RGBA_BITS_B 0x00000004
...@@ -160,7 +171,7 @@ Copyright (C) 2015 ...@@ -160,7 +171,7 @@ Copyright (C) 2015
#define chipMinorFeatures2_UNK8 0x00000100 #define chipMinorFeatures2_UNK8 0x00000100
#define chipMinorFeatures2_UNK9 0x00000200 #define chipMinorFeatures2_UNK9 0x00000200
#define chipMinorFeatures2_UNK10 0x00000400 #define chipMinorFeatures2_UNK10 0x00000400
#define chipMinorFeatures2_SAMPLERBASE_16 0x00000800 #define chipMinorFeatures2_HALTI1 0x00000800
#define chipMinorFeatures2_UNK12 0x00001000 #define chipMinorFeatures2_UNK12 0x00001000
#define chipMinorFeatures2_UNK13 0x00002000 #define chipMinorFeatures2_UNK13 0x00002000
#define chipMinorFeatures2_UNK14 0x00004000 #define chipMinorFeatures2_UNK14 0x00004000
...@@ -189,7 +200,7 @@ Copyright (C) 2015 ...@@ -189,7 +200,7 @@ Copyright (C) 2015
#define chipMinorFeatures3_UNK5 0x00000020 #define chipMinorFeatures3_UNK5 0x00000020
#define chipMinorFeatures3_UNK6 0x00000040 #define chipMinorFeatures3_UNK6 0x00000040
#define chipMinorFeatures3_UNK7 0x00000080 #define chipMinorFeatures3_UNK7 0x00000080
#define chipMinorFeatures3_UNK8 0x00000100 #define chipMinorFeatures3_FAST_MSAA 0x00000100
#define chipMinorFeatures3_UNK9 0x00000200 #define chipMinorFeatures3_UNK9 0x00000200
#define chipMinorFeatures3_BUG_FIXES10 0x00000400 #define chipMinorFeatures3_BUG_FIXES10 0x00000400
#define chipMinorFeatures3_UNK11 0x00000800 #define chipMinorFeatures3_UNK11 0x00000800
...@@ -199,7 +210,7 @@ Copyright (C) 2015 ...@@ -199,7 +210,7 @@ Copyright (C) 2015
#define chipMinorFeatures3_UNK15 0x00008000 #define chipMinorFeatures3_UNK15 0x00008000
#define chipMinorFeatures3_UNK16 0x00010000 #define chipMinorFeatures3_UNK16 0x00010000
#define chipMinorFeatures3_UNK17 0x00020000 #define chipMinorFeatures3_UNK17 0x00020000
#define chipMinorFeatures3_UNK18 0x00040000 #define chipMinorFeatures3_ACE 0x00040000
#define chipMinorFeatures3_UNK19 0x00080000 #define chipMinorFeatures3_UNK19 0x00080000
#define chipMinorFeatures3_UNK20 0x00100000 #define chipMinorFeatures3_UNK20 0x00100000
#define chipMinorFeatures3_UNK21 0x00200000 #define chipMinorFeatures3_UNK21 0x00200000
...@@ -207,7 +218,7 @@ Copyright (C) 2015 ...@@ -207,7 +218,7 @@ Copyright (C) 2015
#define chipMinorFeatures3_UNK23 0x00800000 #define chipMinorFeatures3_UNK23 0x00800000
#define chipMinorFeatures3_UNK24 0x01000000 #define chipMinorFeatures3_UNK24 0x01000000
#define chipMinorFeatures3_UNK25 0x02000000 #define chipMinorFeatures3_UNK25 0x02000000
#define chipMinorFeatures3_UNK26 0x04000000 #define chipMinorFeatures3_NEW_HZ 0x04000000
#define chipMinorFeatures3_UNK27 0x08000000 #define chipMinorFeatures3_UNK27 0x08000000
#define chipMinorFeatures3_UNK28 0x10000000 #define chipMinorFeatures3_UNK28 0x10000000
#define chipMinorFeatures3_UNK29 0x20000000 #define chipMinorFeatures3_UNK29 0x20000000
...@@ -229,9 +240,9 @@ Copyright (C) 2015 ...@@ -229,9 +240,9 @@ Copyright (C) 2015
#define chipMinorFeatures4_UNK13 0x00002000 #define chipMinorFeatures4_UNK13 0x00002000
#define chipMinorFeatures4_UNK14 0x00004000 #define chipMinorFeatures4_UNK14 0x00004000
#define chipMinorFeatures4_UNK15 0x00008000 #define chipMinorFeatures4_UNK15 0x00008000
#define chipMinorFeatures4_UNK16 0x00010000 #define chipMinorFeatures4_HALTI2 0x00010000
#define chipMinorFeatures4_UNK17 0x00020000 #define chipMinorFeatures4_UNK17 0x00020000
#define chipMinorFeatures4_UNK18 0x00040000 #define chipMinorFeatures4_SMALL_MSAA 0x00040000
#define chipMinorFeatures4_UNK19 0x00080000 #define chipMinorFeatures4_UNK19 0x00080000
#define chipMinorFeatures4_UNK20 0x00100000 #define chipMinorFeatures4_UNK20 0x00100000
#define chipMinorFeatures4_UNK21 0x00200000 #define chipMinorFeatures4_UNK21 0x00200000
...@@ -245,5 +256,37 @@ Copyright (C) 2015 ...@@ -245,5 +256,37 @@ Copyright (C) 2015
#define chipMinorFeatures4_UNK29 0x20000000 #define chipMinorFeatures4_UNK29 0x20000000
#define chipMinorFeatures4_UNK30 0x40000000 #define chipMinorFeatures4_UNK30 0x40000000
#define chipMinorFeatures4_UNK31 0x80000000 #define chipMinorFeatures4_UNK31 0x80000000
#define chipMinorFeatures5_UNK0 0x00000001
#define chipMinorFeatures5_UNK1 0x00000002
#define chipMinorFeatures5_UNK2 0x00000004
#define chipMinorFeatures5_UNK3 0x00000008
#define chipMinorFeatures5_UNK4 0x00000010
#define chipMinorFeatures5_UNK5 0x00000020
#define chipMinorFeatures5_UNK6 0x00000040
#define chipMinorFeatures5_UNK7 0x00000080
#define chipMinorFeatures5_UNK8 0x00000100
#define chipMinorFeatures5_HALTI3 0x00000200
#define chipMinorFeatures5_UNK10 0x00000400
#define chipMinorFeatures5_UNK11 0x00000800
#define chipMinorFeatures5_UNK12 0x00001000
#define chipMinorFeatures5_UNK13 0x00002000
#define chipMinorFeatures5_UNK14 0x00004000
#define chipMinorFeatures5_UNK15 0x00008000
#define chipMinorFeatures5_UNK16 0x00010000
#define chipMinorFeatures5_UNK17 0x00020000
#define chipMinorFeatures5_UNK18 0x00040000
#define chipMinorFeatures5_UNK19 0x00080000
#define chipMinorFeatures5_UNK20 0x00100000
#define chipMinorFeatures5_UNK21 0x00200000
#define chipMinorFeatures5_UNK22 0x00400000
#define chipMinorFeatures5_UNK23 0x00800000
#define chipMinorFeatures5_UNK24 0x01000000
#define chipMinorFeatures5_UNK25 0x02000000
#define chipMinorFeatures5_UNK26 0x04000000
#define chipMinorFeatures5_UNK27 0x08000000
#define chipMinorFeatures5_UNK28 0x10000000
#define chipMinorFeatures5_UNK29 0x20000000
#define chipMinorFeatures5_UNK30 0x40000000
#define chipMinorFeatures5_UNK31 0x80000000
#endif /* COMMON_XML */ #endif /* COMMON_XML */
drivers/gpu/drm/etnaviv/state_hi.xml.h
View file @ e2a2e263
...@@ -8,8 +8,8 @@ This file was generated by the rules-ng-ng headergen tool in this git repository ...@@ -8,8 +8,8 @@ This file was generated by the rules-ng-ng headergen tool in this git repository
git clone git://0x04.net/rules-ng-ng git clone git://0x04.net/rules-ng-ng
The rules-ng-ng source files this header was generated from are: The rules-ng-ng source files this header was generated from are:
- state_hi.xml ( 23420 bytes, from 2015-03-25 11:47:21) - state_hi.xml ( 24309 bytes, from 2015-12-12 09:02:53)
- common.xml ( 18437 bytes, from 2015-03-25 11:27:41) - common.xml ( 18437 bytes, from 2015-12-12 09:02:53)
Copyright (C) 2015 Copyright (C) 2015
*/ */
...@@ -182,8 +182,25 @@ Copyright (C) 2015 ...@@ -182,8 +182,25 @@ Copyright (C) 2015
#define VIVS_HI_CHIP_MINOR_FEATURE_3 0x00000088 #define VIVS_HI_CHIP_MINOR_FEATURE_3 0x00000088
#define VIVS_HI_CHIP_SPECS_3 0x0000008c
#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK 0x000001f0
#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT 4
#define VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_3_VARYINGS_COUNT__MASK)
#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__MASK 0x00000007
#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__SHIFT 0
#define VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_3_GPU_CORE_COUNT__MASK)
#define VIVS_HI_CHIP_MINOR_FEATURE_4 0x00000094 #define VIVS_HI_CHIP_MINOR_FEATURE_4 0x00000094
#define VIVS_HI_CHIP_SPECS_4 0x0000009c
#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__MASK 0x0001f000
#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__SHIFT 12
#define VIVS_HI_CHIP_SPECS_4_STREAM_COUNT(x) (((x) << VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__SHIFT) & VIVS_HI_CHIP_SPECS_4_STREAM_COUNT__MASK)
#define VIVS_HI_CHIP_MINOR_FEATURE_5 0x000000a0
#define VIVS_HI_CHIP_PRODUCT_ID 0x000000a8
#define VIVS_PM 0x00000000 #define VIVS_PM 0x00000000
#define VIVS_PM_POWER_CONTROLS 0x00000100 #define VIVS_PM_POWER_CONTROLS 0x00000100
...@@ -206,6 +223,11 @@ Copyright (C) 2015 ...@@ -206,6 +223,11 @@ Copyright (C) 2015
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_FE 0x00000001 #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_FE 0x00000001
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_DE 0x00000002 #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_DE 0x00000002
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_PE 0x00000004 #define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_PE 0x00000004
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_SH 0x00000008
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_PA 0x00000010
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_SE 0x00000020
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_RA 0x00000040
#define VIVS_PM_MODULE_STATUS_MODULE_CLOCK_GATED_TX 0x00000080
#define VIVS_PM_PULSE_EATER 0x0000010c #define VIVS_PM_PULSE_EATER 0x0000010c
......
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