Commit e409fc3d authored by Shawn Lin's avatar Shawn Lin Committed by Heiko Stuebner

ARM: dts: rockchip: add sdmmc and sdio nodes for rk3228 SoC

This patch adds sdmmc/sdio controller nodes for rk3228 SoC.
Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 0d6a01f8
...@@ -527,6 +527,32 @@ tsadc: tsadc@11150000 { ...@@ -527,6 +527,32 @@ tsadc: tsadc@11150000 {
status = "disabled"; status = "disabled";
}; };
sdmmc: dwmmc@30000000 {
compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x30000000 0x4000>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
fifo-depth = <0x100>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
status = "disabled";
};
sdio: dwmmc@30010000 {
compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x30010000 0x4000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
fifo-depth = <0x100>;
pinctrl-names = "default";
pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
status = "disabled";
};
emmc: dwmmc@30020000 { emmc: dwmmc@30020000 {
compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc"; compatible = "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x30020000 0x4000>; reg = <0x30020000 0x4000>;
...@@ -736,6 +762,40 @@ pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma { ...@@ -736,6 +762,40 @@ pcfg_pull_none_drv_12ma: pcfg-pull-none-drv-12ma {
drive-strength = <12>; drive-strength = <12>;
}; };
sdmmc {
sdmmc_clk: sdmmc-clk {
rockchip,pins = <1 RK_PC0 1 &pcfg_pull_none_drv_12ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <1 RK_PB7 1 &pcfg_pull_none_drv_12ma>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <1 RK_PC2 1 &pcfg_pull_none_drv_12ma>,
<1 RK_PC3 1 &pcfg_pull_none_drv_12ma>,
<1 RK_PC4 1 &pcfg_pull_none_drv_12ma>,
<1 RK_PC5 1 &pcfg_pull_none_drv_12ma>;
};
};
sdio {
sdio_clk: sdio-clk {
rockchip,pins = <3 RK_PA0 1 &pcfg_pull_none_drv_12ma>;
};
sdio_cmd: sdio-cmd {
rockchip,pins = <3 RK_PA1 1 &pcfg_pull_none_drv_12ma>;
};
sdio_bus4: sdio-bus4 {
rockchip,pins = <3 RK_PA2 1 &pcfg_pull_none_drv_12ma>,
<3 RK_PA3 1 &pcfg_pull_none_drv_12ma>,
<3 RK_PA4 1 &pcfg_pull_none_drv_12ma>,
<3 RK_PA5 1 &pcfg_pull_none_drv_12ma>;
};
};
emmc { emmc {
emmc_clk: emmc-clk { emmc_clk: emmc-clk {
rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>; rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_none>;
......
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