Commit e5c62edd authored by Alex Deucher's avatar Alex Deucher

drm/amdgpu/gfx9: add gfx config for vega12

Just a place holder for now.
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarFeifei Xu <Feifei.Xu@amd.com>
parent d5e8ef06
...@@ -981,6 +981,15 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) ...@@ -981,6 +981,15 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0; adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0;
gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN; gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN;
break; break;
case CHIP_VEGA12:
adev->gfx.config.max_hw_contexts = 8;
adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;
adev->gfx.config.sc_prim_fifo_size_backend = 0x100;
adev->gfx.config.sc_hiz_tile_fifo_size = 0x30;
adev->gfx.config.sc_earlyz_tile_fifo_size = 0x4C0;
gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN;
DRM_INFO("fix gfx.config for vega12\n");
break;
case CHIP_RAVEN: case CHIP_RAVEN:
adev->gfx.config.max_hw_contexts = 8; adev->gfx.config.max_hw_contexts = 8;
adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;
......
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