Commit e8f3de96 authored by Rob Clark's avatar Rob Clark

drm/msm/adreno: split out helper to load fw

Prep work for the next patch.
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent eec874ce
...@@ -26,8 +26,9 @@ static void a5xx_dump(struct msm_gpu *gpu); ...@@ -26,8 +26,9 @@ static void a5xx_dump(struct msm_gpu *gpu);
#define GPU_PAS_ID 13 #define GPU_PAS_ID 13
static int zap_shader_load_mdt(struct device *dev, const char *fwname) static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname)
{ {
struct device *dev = &gpu->pdev->dev;
const struct firmware *fw; const struct firmware *fw;
struct device_node *np; struct device_node *np;
struct resource r; struct resource r;
...@@ -55,10 +56,10 @@ static int zap_shader_load_mdt(struct device *dev, const char *fwname) ...@@ -55,10 +56,10 @@ static int zap_shader_load_mdt(struct device *dev, const char *fwname)
mem_size = resource_size(&r); mem_size = resource_size(&r);
/* Request the MDT file for the firmware */ /* Request the MDT file for the firmware */
ret = request_firmware(&fw, fwname, dev); fw = adreno_request_fw(to_adreno_gpu(gpu), fwname);
if (ret) { if (IS_ERR(fw)) {
DRM_DEV_ERROR(dev, "Unable to load %s\n", fwname); DRM_DEV_ERROR(dev, "Unable to load %s\n", fwname);
return ret; return PTR_ERR(fw);
} }
/* Figure out how much memory we need */ /* Figure out how much memory we need */
...@@ -381,7 +382,7 @@ static int a5xx_zap_shader_init(struct msm_gpu *gpu) ...@@ -381,7 +382,7 @@ static int a5xx_zap_shader_init(struct msm_gpu *gpu)
return -ENODEV; return -ENODEV;
} }
ret = zap_shader_load_mdt(&pdev->dev, adreno_gpu->info->zapfw); ret = zap_shader_load_mdt(gpu, adreno_gpu->info->zapfw);
loaded = !ret; loaded = !ret;
......
...@@ -264,7 +264,8 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) ...@@ -264,7 +264,8 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
return; return;
/* Get the firmware */ /* Get the firmware */
if (request_firmware(&fw, adreno_gpu->info->gpmufw, drm->dev)) { fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->gpmufw);
if (IS_ERR(fw)) {
DRM_ERROR("%s: Could not get GPMU firmware. GPMU will not be active\n", DRM_ERROR("%s: Could not get GPMU firmware. GPMU will not be active\n",
gpu->name); gpu->name);
return; return;
......
...@@ -64,29 +64,41 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) ...@@ -64,29 +64,41 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)
} }
} }
static int adreno_load_fw(struct adreno_gpu *adreno_gpu) const struct firmware *
adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname)
{ {
struct drm_device *drm = adreno_gpu->base.dev; struct drm_device *drm = adreno_gpu->base.dev;
const struct firmware *fw = NULL;
int ret; int ret;
ret = request_firmware(&fw, fwname, drm->dev);
if (ret) {
dev_err(drm->dev, "failed to load %s: %d\n", fwname, ret);
return ERR_PTR(ret);
}
return fw;
}
static int adreno_load_fw(struct adreno_gpu *adreno_gpu)
{
const struct firmware *fw;
if (adreno_gpu->pm4) if (adreno_gpu->pm4)
return 0; return 0;
ret = request_firmware(&adreno_gpu->pm4, adreno_gpu->info->pm4fw, drm->dev); fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->pm4fw);
if (ret) { if (IS_ERR(fw))
dev_err(drm->dev, "failed to load %s PM4 firmware: %d\n", return PTR_ERR(fw);
adreno_gpu->info->pm4fw, ret); adreno_gpu->pm4 = fw;
return ret;
}
ret = request_firmware(&adreno_gpu->pfp, adreno_gpu->info->pfpfw, drm->dev); fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->pfpfw);
if (ret) { if (IS_ERR(fw)) {
dev_err(drm->dev, "failed to load %s PFP firmware: %d\n",
adreno_gpu->info->pfpfw, ret);
release_firmware(adreno_gpu->pm4); release_firmware(adreno_gpu->pm4);
adreno_gpu->pm4 = NULL; adreno_gpu->pm4 = NULL;
return ret; return PTR_ERR(fw);
} }
adreno_gpu->pfp = fw;
return 0; return 0;
} }
......
...@@ -196,6 +196,8 @@ static inline int adreno_is_a530(struct adreno_gpu *gpu) ...@@ -196,6 +196,8 @@ static inline int adreno_is_a530(struct adreno_gpu *gpu)
} }
int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value); int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu,
const char *fwname);
int adreno_hw_init(struct msm_gpu *gpu); int adreno_hw_init(struct msm_gpu *gpu);
uint32_t adreno_last_fence(struct msm_gpu *gpu); uint32_t adreno_last_fence(struct msm_gpu *gpu);
void adreno_recover(struct msm_gpu *gpu); void adreno_recover(struct msm_gpu *gpu);
......
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