Commit e903382c authored by Sandeep Sanjay Patil's avatar Sandeep Sanjay Patil Committed by Russell King

[ARM] 4384/1: S3C2412/13 SPI registers offset correction

Change the SPI Channel 1 register offset in s3c_spi1_resource[], and
s3c2412_dma_mappings[]. Offset has to be 0x100 in s3c2412/13's case.
Also, total SPI memory resource size changed to 0x24 for s3c2412/13.
Signed-off-by: default avatarSandeep Patil <psandeep.s@gmail.com>
Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent d73d8011
...@@ -59,8 +59,8 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { ...@@ -59,8 +59,8 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
[DMACH_SPI1] = { [DMACH_SPI1] = {
.name = "spi1", .name = "spi1",
.channels = MAP(S3C2412_DMAREQSEL_SPI1TX), .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
.hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT, .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
.hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT, .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
}, },
[DMACH_UART0] = { [DMACH_UART0] = {
.name = "uart0", .name = "uart0",
......
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#include <asm/arch/regs-gpio.h> #include <asm/arch/regs-gpio.h>
#include <asm/arch/regs-gpioj.h> #include <asm/arch/regs-gpioj.h>
#include <asm/arch/regs-dsc.h> #include <asm/arch/regs-dsc.h>
#include <asm/arch/regs-spi.h>
#include <asm/plat-s3c24xx/s3c2412.h> #include <asm/plat-s3c24xx/s3c2412.h>
#include <asm/plat-s3c24xx/cpu.h> #include <asm/plat-s3c24xx/cpu.h>
...@@ -74,6 +75,14 @@ void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no) ...@@ -74,6 +75,14 @@ void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
s3c_device_sdi.name = "s3c2412-sdi"; s3c_device_sdi.name = "s3c2412-sdi";
s3c_device_lcd.name = "s3c2412-lcd"; s3c_device_lcd.name = "s3c2412-lcd";
s3c_device_nand.name = "s3c2412-nand"; s3c_device_nand.name = "s3c2412-nand";
/* spi channel related changes, s3c2412/13 specific */
s3c_device_spi0.name = "s3c2412-spi";
s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24;
s3c_device_spi1.name = "s3c2412-spi";
s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1;
s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24;
} }
/* s3c2412_idle /* s3c2412_idle
......
...@@ -33,6 +33,7 @@ ...@@ -33,6 +33,7 @@
#include <asm/plat-s3c24xx/devs.h> #include <asm/plat-s3c24xx/devs.h>
#include <asm/plat-s3c24xx/cpu.h> #include <asm/plat-s3c24xx/cpu.h>
#include <asm/arch/regs-spi.h>
/* Serial port registrations */ /* Serial port registrations */
...@@ -437,8 +438,8 @@ EXPORT_SYMBOL(s3c_device_spi0); ...@@ -437,8 +438,8 @@ EXPORT_SYMBOL(s3c_device_spi0);
static struct resource s3c_spi1_resource[] = { static struct resource s3c_spi1_resource[] = {
[0] = { [0] = {
.start = S3C24XX_PA_SPI + 0x20, .start = S3C24XX_PA_SPI + S3C2410_SPI1,
.end = S3C24XX_PA_SPI + 0x20 + 0x1f, .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
......
...@@ -12,6 +12,8 @@ ...@@ -12,6 +12,8 @@
#ifndef __ASM_ARCH_REGS_SPI_H #ifndef __ASM_ARCH_REGS_SPI_H
#define __ASM_ARCH_REGS_SPI_H #define __ASM_ARCH_REGS_SPI_H
#define S3C2410_SPI1 (0x20)
#define S3C2412_SPI1 (0x100)
#define S3C2410_SPCON (0x00) #define S3C2410_SPCON (0x00)
......
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