Commit ebeec0af authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Thierry Reding

pwm: Update DT bindings to reference pwm.txt for cells documentation

The PWM client cells format is documented in the generic pwm.txt
documentation and duplicated in all PWM driver bindings. Remove
duplicate information and reference pwm.txt instead.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent 208be769
...@@ -2,11 +2,9 @@ Atmel TCB PWM controller ...@@ -2,11 +2,9 @@ Atmel TCB PWM controller
Required properties: Required properties:
- compatible: should be "atmel,tcb-pwm" - compatible: should be "atmel,tcb-pwm"
- #pwm-cells: Should be 3. The first cell specifies the per-chip index - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
of the PWM to use, the second cell is the period in nanoseconds and the cells format. The only third cell flag supported by this binding is
bit 0 in the third cell is used to encode the polarity of PWM output. PWM_POLARITY_INVERTED.
Set bit 0 of the third cell in PWM specifier to 1 for inverse polarity &
set to 0 for normal polarity.
- tc-block: The Timer Counter block to use as a PWM chip. - tc-block: The Timer Counter block to use as a PWM chip.
Example: Example:
......
...@@ -3,8 +3,8 @@ Freescale i.MX PWM controller ...@@ -3,8 +3,8 @@ Freescale i.MX PWM controller
Required properties: Required properties:
- compatible: should be "fsl,<soc>-pwm" - compatible: should be "fsl,<soc>-pwm"
- reg: physical base address and length of the controller's registers - reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. The first cell specifies the per-chip index - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
of the PWM to use and the second cell is the period in nanoseconds. the cells format.
- interrupts: The interrupt for the pwm controller - interrupts: The interrupt for the pwm controller
Example: Example:
......
...@@ -3,8 +3,8 @@ Freescale MXS PWM controller ...@@ -3,8 +3,8 @@ Freescale MXS PWM controller
Required properties: Required properties:
- compatible: should be "fsl,imx23-pwm" - compatible: should be "fsl,imx23-pwm"
- reg: physical base address and length of the controller's registers - reg: physical base address and length of the controller's registers
- #pwm-cells: should be 2. The first cell specifies the per-chip index - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
of the PWM to use and the second cell is the period in nanoseconds. the cells format.
- fsl,pwm-number: the number of PWM devices - fsl,pwm-number: the number of PWM devices
Example: Example:
......
...@@ -5,9 +5,8 @@ Required properties: ...@@ -5,9 +5,8 @@ Required properties:
- "nvidia,tegra20-pwm" - "nvidia,tegra20-pwm"
- "nvidia,tegra30-pwm" - "nvidia,tegra30-pwm"
- reg: physical base address and length of the controller's registers - reg: physical base address and length of the controller's registers
- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
first cell specifies the per-chip index of the PWM to use and the second the cells format.
cell is the period in nanoseconds.
Example: Example:
......
...@@ -3,8 +3,8 @@ NXP PCA9685 16-channel 12-bit PWM LED controller ...@@ -3,8 +3,8 @@ NXP PCA9685 16-channel 12-bit PWM LED controller
Required properties: Required properties:
- compatible: "nxp,pca9685-pwm" - compatible: "nxp,pca9685-pwm"
- #pwm-cells: should be 2. The first cell specifies the per-chip index - #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
of the PWM to use and the second cell is the period in nanoseconds. the cells format.
The index 16 is the ALLCALL channel, that sets all PWM channels at the same The index 16 is the ALLCALL channel, that sets all PWM channels at the same
time. time.
......
...@@ -19,13 +19,9 @@ Required properties: ...@@ -19,13 +19,9 @@ Required properties:
- reg: base address and size of register area - reg: base address and size of register area
- interrupts: list of timer interrupts (one interrupt per timer, starting at - interrupts: list of timer interrupts (one interrupt per timer, starting at
timer 0) timer 0)
- #pwm-cells: number of cells used for PWM specifier - must be 3 - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
the specifier format is as follows: the cells format. The only third cell flag supported by this binding is
- phandle to PWM controller node PWM_POLARITY_INVERTED.
- index of PWM channel (from 0 to 4)
- PWM signal period in nanoseconds
- bitmask of optional PWM flags:
0x1 - invert PWM signal
Optional properties: Optional properties:
- samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular - samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular
......
...@@ -4,11 +4,9 @@ Required properties: ...@@ -4,11 +4,9 @@ Required properties:
- compatible: Must be "ti,<soc>-ecap". - compatible: Must be "ti,<soc>-ecap".
for am33xx - compatible = "ti,am33xx-ecap"; for am33xx - compatible = "ti,am33xx-ecap";
for da850 - compatible = "ti,da850-ecap", "ti,am33xx-ecap"; for da850 - compatible = "ti,da850-ecap", "ti,am33xx-ecap";
- #pwm-cells: Should be 3. Number of cells being used to specify PWM property. - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
First cell specifies the per-chip index of the PWM to use, the second the cells format. The PWM channel index ranges from 0 to 4. The only third
cell is the period in nanoseconds and bit 0 in the third cell is used to cell flag supported by this binding is PWM_POLARITY_INVERTED.
encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
to 1 for inverse polarity & set to 0 for normal polarity.
- reg: physical base address and size of the registers map. - reg: physical base address and size of the registers map.
Optional properties: Optional properties:
......
...@@ -4,11 +4,9 @@ Required properties: ...@@ -4,11 +4,9 @@ Required properties:
- compatible: Must be "ti,<soc>-ehrpwm". - compatible: Must be "ti,<soc>-ehrpwm".
for am33xx - compatible = "ti,am33xx-ehrpwm"; for am33xx - compatible = "ti,am33xx-ehrpwm";
for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm";
- #pwm-cells: Should be 3. Number of cells being used to specify PWM property. - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
First cell specifies the per-chip index of the PWM to use, the second the cells format. The only third cell flag supported by this binding is
cell is the period in nanoseconds and bit 0 in the third cell is used to PWM_POLARITY_INVERTED.
encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
to 1 for inverse polarity & set to 0 for normal polarity.
- reg: physical base address and size of the registers map. - reg: physical base address and size of the registers map.
Optional properties: Optional properties:
......
...@@ -5,9 +5,8 @@ Required properties: ...@@ -5,9 +5,8 @@ Required properties:
- "st,spear320-pwm" - "st,spear320-pwm"
- "st,spear1340-pwm" - "st,spear1340-pwm"
- reg: physical base address and length of the controller's registers - reg: physical base address and length of the controller's registers
- #pwm-cells: number of cells used to specify PWM which is fixed to 2 on - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
SPEAr. The first cell specifies the per-chip index of the PWM to use and the cells format.
the second cell is the period in nanoseconds.
Example: Example:
......
...@@ -6,8 +6,8 @@ On TWL6030 series: PWM0 and PWM1 ...@@ -6,8 +6,8 @@ On TWL6030 series: PWM0 and PWM1
Required properties: Required properties:
- compatible: "ti,twl4030-pwm" or "ti,twl6030-pwm" - compatible: "ti,twl4030-pwm" or "ti,twl6030-pwm"
- #pwm-cells: should be 2. The first cell specifies the per-chip index - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
of the PWM to use and the second cell is the period in nanoseconds. the cells format.
Example: Example:
......
...@@ -6,8 +6,8 @@ On TWL6030 series: LED PWM (mainly used as charging indicator LED) ...@@ -6,8 +6,8 @@ On TWL6030 series: LED PWM (mainly used as charging indicator LED)
Required properties: Required properties:
- compatible: "ti,twl4030-pwmled" or "ti,twl6030-pwmled" - compatible: "ti,twl4030-pwmled" or "ti,twl6030-pwmled"
- #pwm-cells: should be 2. The first cell specifies the per-chip index - #pwm-cells: should be 2. See pwm.txt in this directory for a description of
of the PWM to use and the second cell is the period in nanoseconds. the cells format.
Example: Example:
......
...@@ -3,11 +3,9 @@ VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller ...@@ -3,11 +3,9 @@ VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller
Required properties: Required properties:
- compatible: should be "via,vt8500-pwm" - compatible: should be "via,vt8500-pwm"
- reg: physical base address and length of the controller's registers - reg: physical base address and length of the controller's registers
- #pwm-cells: Should be 3. Number of cells being used to specify PWM property. - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
First cell specifies the per-chip index of the PWM to use, the second the cells format. The only third cell flag supported by this binding is
cell is the period in nanoseconds and bit 0 in the third cell is used to PWM_POLARITY_INVERTED.
encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
to 1 for inverse polarity & set to 0 for normal polarity.
- clocks: phandle to the PWM source clock - clocks: phandle to the PWM source clock
Example: Example:
......
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