Commit ed3f2453 authored by Sarah Sharp's avatar Sarah Sharp Committed by Greg Kroah-Hartman

USB: xhci: Don't flush doorbell writes.

To tell the host controller that there are transfers on the endpoint
rings, we need to ring the endpoint doorbell.  This is a PCI MMIO write,
which can be delayed until another register read is queued.

The previous code would flush the doorbell write by reading the doorbell
register after the write.  This may take time, and it's not necessary to
force the host controller to know about the transfers right away.  Don't
flush the doorbell register writes.
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent c21599a3
...@@ -337,11 +337,6 @@ static void ring_ep_doorbell(struct xhci_hcd *xhci, ...@@ -337,11 +337,6 @@ static void ring_ep_doorbell(struct xhci_hcd *xhci,
field = xhci_readl(xhci, db_addr) & DB_MASK; field = xhci_readl(xhci, db_addr) & DB_MASK;
field |= EPI_TO_DB(ep_index) | STREAM_ID_TO_DB(stream_id); field |= EPI_TO_DB(ep_index) | STREAM_ID_TO_DB(stream_id);
xhci_writel(xhci, field, db_addr); xhci_writel(xhci, field, db_addr);
/* Flush PCI posted writes - FIXME Matthew Wilcox says this
* isn't time-critical and we shouldn't make the CPU wait for
* the flush.
*/
xhci_readl(xhci, db_addr);
} }
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment