Commit f039dfb5 authored by Ezequiel Garcia's avatar Ezequiel Garcia Committed by Jason Cooper

ARM: mvebu: Add the core-divider clock to Armada 370/XP

The Armada 370/XP SoC has a clock provider called "Core Divider",
that is derived from a fixed 2 GHz PLL clock.
Reviewed-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 4675cf57
...@@ -138,6 +138,14 @@ serial@12100 { ...@@ -138,6 +138,14 @@ serial@12100 {
status = "disabled"; status = "disabled";
}; };
coredivclk: corediv-clock@18740 {
compatible = "marvell,armada-370-corediv-clock";
reg = <0x18740 0xc>;
#clock-cells = <1>;
clocks = <&mainpll>;
clock-output-names = "nand";
};
timer@20300 { timer@20300 {
reg = <0x20300 0x30>, <0x21040 0x30>; reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>; interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
......
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