Commit f0d759f0 authored by Gustavo A. R. Silva's avatar Gustavo A. R. Silva Committed by Jani Nikula

drm/i915: Mark expected switch fall-throughs

In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.

Addresses-Coverity-ID: 141432
Addresses-Coverity-ID: 141433
Addresses-Coverity-ID: 141434
Addresses-Coverity-ID: 141435
Addresses-Coverity-ID: 141436
Addresses-Coverity-ID: 1357360
Addresses-Coverity-ID: 1357403
Addresses-Coverity-ID: 1357433
Addresses-Coverity-ID: 1392622
Addresses-Coverity-ID: 1415273
Addresses-Coverity-ID: 1435752
Addresses-Coverity-ID: 1441500
Addresses-Coverity-ID: 1454596
Signed-off-by: default avatarGustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180628223541.GA17665@embeddedor.com
parent 27efd256
...@@ -2120,6 +2120,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf) ...@@ -2120,6 +2120,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
*/ */
if (!i915_terminally_wedged(&dev_priv->gpu_error)) if (!i915_terminally_wedged(&dev_priv->gpu_error))
return VM_FAULT_SIGBUS; return VM_FAULT_SIGBUS;
/* else: fall through */
case -EAGAIN: case -EAGAIN:
/* /*
* EAGAIN means the gpu is hung and we'll wait for the error * EAGAIN means the gpu is hung and we'll wait for the error
......
...@@ -254,6 +254,7 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *dev_priv, ...@@ -254,6 +254,7 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *dev_priv,
switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) { switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {
default: default:
MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK); MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
/* fall through */
case GEN7_STOLEN_RESERVED_1M: case GEN7_STOLEN_RESERVED_1M:
*size = 1024 * 1024; *size = 1024 * 1024;
break; break;
......
...@@ -316,6 +316,7 @@ static void pnv_get_cdclk(struct drm_i915_private *dev_priv, ...@@ -316,6 +316,7 @@ static void pnv_get_cdclk(struct drm_i915_private *dev_priv,
break; break;
default: default:
DRM_ERROR("Unknown pnv display core clock 0x%04x\n", gcfgc); DRM_ERROR("Unknown pnv display core clock 0x%04x\n", gcfgc);
/* fall through */
case GC_DISPLAY_CLOCK_133_MHZ_PNV: case GC_DISPLAY_CLOCK_133_MHZ_PNV:
cdclk_state->cdclk = 133333; cdclk_state->cdclk = 133333;
break; break;
...@@ -1797,6 +1798,7 @@ static int icl_calc_cdclk(int min_cdclk, unsigned int ref) ...@@ -1797,6 +1798,7 @@ static int icl_calc_cdclk(int min_cdclk, unsigned int ref)
switch (ref) { switch (ref) {
default: default:
MISSING_CASE(ref); MISSING_CASE(ref);
/* fall through */
case 24000: case 24000:
ranges = ranges_24; ranges = ranges_24;
break; break;
...@@ -1824,6 +1826,7 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk) ...@@ -1824,6 +1826,7 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
switch (cdclk) { switch (cdclk) {
default: default:
MISSING_CASE(cdclk); MISSING_CASE(cdclk);
/* fall through */
case 307200: case 307200:
case 556800: case 556800:
case 652800: case 652800:
...@@ -1896,6 +1899,7 @@ static u8 icl_calc_voltage_level(int cdclk) ...@@ -1896,6 +1899,7 @@ static u8 icl_calc_voltage_level(int cdclk)
return 1; return 1;
default: default:
MISSING_CASE(cdclk); MISSING_CASE(cdclk);
/* fall through */
case 652800: case 652800:
case 648000: case 648000:
return 2; return 2;
...@@ -1913,6 +1917,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv, ...@@ -1913,6 +1917,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
switch (val & ICL_DSSM_CDCLK_PLL_REFCLK_MASK) { switch (val & ICL_DSSM_CDCLK_PLL_REFCLK_MASK) {
default: default:
MISSING_CASE(val); MISSING_CASE(val);
/* fall through */
case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz: case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:
cdclk_state->ref = 24000; cdclk_state->ref = 24000;
break; break;
......
...@@ -1069,6 +1069,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder, ...@@ -1069,6 +1069,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder,
switch (id) { switch (id) {
default: default:
MISSING_CASE(id); MISSING_CASE(id);
/* fall through */
case DPLL_ID_ICL_DPLL0: case DPLL_ID_ICL_DPLL0:
case DPLL_ID_ICL_DPLL1: case DPLL_ID_ICL_DPLL1:
return DDI_CLK_SEL_NONE; return DDI_CLK_SEL_NONE;
......
...@@ -9360,6 +9360,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, ...@@ -9360,6 +9360,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
switch (tmp & TRANS_DDI_EDP_INPUT_MASK) { switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
default: default:
WARN(1, "unknown pipe linked to edp transcoder\n"); WARN(1, "unknown pipe linked to edp transcoder\n");
/* fall through */
case TRANS_DDI_EDP_INPUT_A_ONOFF: case TRANS_DDI_EDP_INPUT_A_ONOFF:
case TRANS_DDI_EDP_INPUT_A_ON: case TRANS_DDI_EDP_INPUT_A_ON:
trans_edp_pipe = PIPE_A; trans_edp_pipe = PIPE_A;
...@@ -11024,6 +11025,7 @@ static bool check_digital_port_conflicts(struct drm_atomic_state *state) ...@@ -11024,6 +11025,7 @@ static bool check_digital_port_conflicts(struct drm_atomic_state *state)
case INTEL_OUTPUT_DDI: case INTEL_OUTPUT_DDI:
if (WARN_ON(!HAS_DDI(to_i915(dev)))) if (WARN_ON(!HAS_DDI(to_i915(dev))))
break; break;
/* else: fall through */
case INTEL_OUTPUT_DP: case INTEL_OUTPUT_DP:
case INTEL_OUTPUT_HDMI: case INTEL_OUTPUT_HDMI:
case INTEL_OUTPUT_EDP: case INTEL_OUTPUT_EDP:
......
...@@ -2566,6 +2566,7 @@ int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv, ...@@ -2566,6 +2566,7 @@ int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv,
switch (index) { switch (index) {
default: default:
MISSING_CASE(index); MISSING_CASE(index);
/* fall through */
case 0: case 0:
link_clock = 540000; link_clock = 540000;
break; break;
...@@ -2639,6 +2640,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc, ...@@ -2639,6 +2640,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
switch (div1) { switch (div1) {
default: default:
MISSING_CASE(div1); MISSING_CASE(div1);
/* fall through */
case 2: case 2:
hsdiv = 0; hsdiv = 0;
break; break;
...@@ -2903,6 +2905,7 @@ static i915_reg_t icl_pll_id_to_enable_reg(enum intel_dpll_id id) ...@@ -2903,6 +2905,7 @@ static i915_reg_t icl_pll_id_to_enable_reg(enum intel_dpll_id id)
switch (id) { switch (id) {
default: default:
MISSING_CASE(id); MISSING_CASE(id);
/* fall through */
case DPLL_ID_ICL_DPLL0: case DPLL_ID_ICL_DPLL0:
case DPLL_ID_ICL_DPLL1: case DPLL_ID_ICL_DPLL1:
return CNL_DPLL_ENABLE(id); return CNL_DPLL_ENABLE(id);
......
...@@ -1253,6 +1253,7 @@ enc_to_dig_port(struct drm_encoder *encoder) ...@@ -1253,6 +1253,7 @@ enc_to_dig_port(struct drm_encoder *encoder)
switch (intel_encoder->type) { switch (intel_encoder->type) {
case INTEL_OUTPUT_DDI: case INTEL_OUTPUT_DDI:
WARN_ON(!HAS_DDI(to_i915(encoder->dev))); WARN_ON(!HAS_DDI(to_i915(encoder->dev)));
/* fall through */
case INTEL_OUTPUT_DP: case INTEL_OUTPUT_DP:
case INTEL_OUTPUT_EDP: case INTEL_OUTPUT_EDP:
case INTEL_OUTPUT_HDMI: case INTEL_OUTPUT_HDMI:
......
...@@ -229,6 +229,7 @@ __intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class) ...@@ -229,6 +229,7 @@ __intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
break; break;
default: default:
MISSING_CASE(class); MISSING_CASE(class);
/* fall through */
case VIDEO_DECODE_CLASS: case VIDEO_DECODE_CLASS:
case VIDEO_ENHANCEMENT_CLASS: case VIDEO_ENHANCEMENT_CLASS:
case COPY_ENGINE_CLASS: case COPY_ENGINE_CLASS:
......
...@@ -3212,6 +3212,7 @@ static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv, ...@@ -3212,6 +3212,7 @@ static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv,
switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) { switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {
default: default:
MISSING_CASE(val); MISSING_CASE(val);
/* fall through */
case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0: case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0:
procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0]; procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
break; break;
......
...@@ -1340,6 +1340,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder, ...@@ -1340,6 +1340,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
switch (crtc_state->pixel_multiplier) { switch (crtc_state->pixel_multiplier) {
default: default:
WARN(1, "unknown pixel multiplier specified\n"); WARN(1, "unknown pixel multiplier specified\n");
/* fall through */
case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break; case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break; case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break; case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
...@@ -2316,14 +2317,19 @@ intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) ...@@ -2316,14 +2317,19 @@ intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
switch (sdvo->controlled_output) { switch (sdvo->controlled_output) {
case SDVO_OUTPUT_LVDS1: case SDVO_OUTPUT_LVDS1:
mask |= SDVO_OUTPUT_LVDS1; mask |= SDVO_OUTPUT_LVDS1;
/* fall through */
case SDVO_OUTPUT_LVDS0: case SDVO_OUTPUT_LVDS0:
mask |= SDVO_OUTPUT_LVDS0; mask |= SDVO_OUTPUT_LVDS0;
/* fall through */
case SDVO_OUTPUT_TMDS1: case SDVO_OUTPUT_TMDS1:
mask |= SDVO_OUTPUT_TMDS1; mask |= SDVO_OUTPUT_TMDS1;
/* fall through */
case SDVO_OUTPUT_TMDS0: case SDVO_OUTPUT_TMDS0:
mask |= SDVO_OUTPUT_TMDS0; mask |= SDVO_OUTPUT_TMDS0;
/* fall through */
case SDVO_OUTPUT_RGB1: case SDVO_OUTPUT_RGB1:
mask |= SDVO_OUTPUT_RGB1; mask |= SDVO_OUTPUT_RGB1;
/* fall through */
case SDVO_OUTPUT_RGB0: case SDVO_OUTPUT_RGB0:
mask |= SDVO_OUTPUT_RGB0; mask |= SDVO_OUTPUT_RGB0;
break; break;
......
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