Commit f1bece7f authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt Committed by Dave Airlie

drm/radeon: ATOM Endian fix for atombios_crtc_program_pll()

v6 of the structure was programmed incorrectly:

  args.v6.ulCrtcPclkFreq.ulPixelClock = cpu_to_le32(clock / 10);

ulPixelClock is a 24-bit bitfield. This statement would thus
do a 32-bit swap of (clock / 10) and drop the top 8 bits which
are ... the LSB. Not what we want. Instead use masks & shifts.
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent edc02bff
...@@ -764,7 +764,7 @@ static void atombios_crtc_set_dcpll(struct drm_crtc *crtc, ...@@ -764,7 +764,7 @@ static void atombios_crtc_set_dcpll(struct drm_crtc *crtc,
} }
static void atombios_crtc_program_pll(struct drm_crtc *crtc, static void atombios_crtc_program_pll(struct drm_crtc *crtc,
int crtc_id, u32 crtc_id,
int pll_id, int pll_id,
u32 encoder_mode, u32 encoder_mode,
u32 encoder_id, u32 encoder_id,
...@@ -851,8 +851,7 @@ static void atombios_crtc_program_pll(struct drm_crtc *crtc, ...@@ -851,8 +851,7 @@ static void atombios_crtc_program_pll(struct drm_crtc *crtc,
args.v5.ucPpll = pll_id; args.v5.ucPpll = pll_id;
break; break;
case 6: case 6:
args.v6.ulCrtcPclkFreq.ucCRTC = crtc_id; args.v6.ulDispEngClkFreq = cpu_to_le32(crtc_id << 24 | clock / 10);
args.v6.ulCrtcPclkFreq.ulPixelClock = cpu_to_le32(clock / 10);
args.v6.ucRefDiv = ref_div; args.v6.ucRefDiv = ref_div;
args.v6.usFbDiv = cpu_to_le16(fb_div); args.v6.usFbDiv = cpu_to_le16(fb_div);
args.v6.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); args.v6.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000);
......
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