Commit f1e1c9e5 authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by Thomas Gleixner

perf/x86/intel/bts: Make sure debug store is valid

Since commit 4d4c4741 ("perf/x86/intel/bts: Fix BTS PMI detection")
my box goes boom on boot:

| .... node  #0, CPUs:      #1 #2 #3 #4 #5 #6 #7
| BUG: unable to handle kernel NULL pointer dereference at 0000000000000018
| IP: [<ffffffff8100c463>] intel_bts_interrupt+0x43/0x130
| Call Trace:
|  <NMI> d [<ffffffff8100b341>] intel_pmu_handle_irq+0x51/0x4b0
|  [<ffffffff81004d47>] perf_event_nmi_handler+0x27/0x40

This happens because the code introduced in this commit dereferences the
debug store pointer unconditionally. The debug store is not guaranteed to
be available, so a NULL pointer check as on other places is required.

Fixes: 4d4c4741 ("perf/x86/intel/bts: Fix BTS PMI detection")
Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: default avatarAlexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: vince@deater.net
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/20160920131220.xg5pbdjtznszuyzb@breakpoint.ccSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 3be79886
...@@ -455,7 +455,7 @@ int intel_bts_interrupt(void) ...@@ -455,7 +455,7 @@ int intel_bts_interrupt(void)
* The only surefire way of knowing if this NMI is ours is by checking * The only surefire way of knowing if this NMI is ours is by checking
* the write ptr against the PMI threshold. * the write ptr against the PMI threshold.
*/ */
if (ds->bts_index >= ds->bts_interrupt_threshold) if (ds && (ds->bts_index >= ds->bts_interrupt_threshold))
handled = 1; handled = 1;
/* /*
......
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