Commit f3791203 authored by Philip J Kelleher's avatar Philip J Kelleher Committed by Jens Axboe

block: IBM RamSan 70/80 trivial changes.

This patch includes trivial changes that were recommended by
different members of the Linux Community.

Changes include:
o Removing the redundant wmb().
o Formatting
o Various other little things.
Signed-off-by: default avatarPhilip J Kelleher <pjk1939@linux.vnet.ibm.com>
Signed-off-by: default avatarJens Axboe <axboe@kernel.dk>
parent f6161aa1
...@@ -29,10 +29,8 @@ ...@@ -29,10 +29,8 @@
#include "rsxx_priv.h" #include "rsxx_priv.h"
#include "rsxx_cfg.h" #include "rsxx_cfg.h"
static void initialize_config(void *config) static void initialize_config(struct rsxx_card_cfg *cfg)
{ {
struct rsxx_card_cfg *cfg = config;
cfg->hdr.version = RSXX_CFG_VERSION; cfg->hdr.version = RSXX_CFG_VERSION;
cfg->data.block_size = RSXX_HW_BLK_SIZE; cfg->data.block_size = RSXX_HW_BLK_SIZE;
...@@ -181,7 +179,7 @@ int rsxx_load_config(struct rsxx_cardinfo *card) ...@@ -181,7 +179,7 @@ int rsxx_load_config(struct rsxx_cardinfo *card)
} else { } else {
dev_info(CARD_TO_DEV(card), dev_info(CARD_TO_DEV(card),
"Initializing card configuration.\n"); "Initializing card configuration.\n");
initialize_config(card); initialize_config(&card->config);
st = rsxx_save_config(card); st = rsxx_save_config(card);
if (st) if (st)
return st; return st;
......
...@@ -161,9 +161,9 @@ static irqreturn_t rsxx_isr(int irq, void *pdata) ...@@ -161,9 +161,9 @@ static irqreturn_t rsxx_isr(int irq, void *pdata)
} }
/*----------------- Card Event Handler -------------------*/ /*----------------- Card Event Handler -------------------*/
static char *rsxx_card_state_to_str(unsigned int state) static const char * const rsxx_card_state_to_str(unsigned int state)
{ {
static char *state_strings[] = { static const char * const state_strings[] = {
"Unknown", "Shutdown", "Starting", "Formatting", "Unknown", "Shutdown", "Starting", "Formatting",
"Uninitialized", "Good", "Shutting Down", "Uninitialized", "Good", "Shutting Down",
"Fault", "Read Only Fault", "dStroying" "Fault", "Read Only Fault", "dStroying"
......
...@@ -126,13 +126,6 @@ static void creg_issue_cmd(struct rsxx_cardinfo *card, struct creg_cmd *cmd) ...@@ -126,13 +126,6 @@ static void creg_issue_cmd(struct rsxx_cardinfo *card, struct creg_cmd *cmd)
cmd->buf, cmd->stream); cmd->buf, cmd->stream);
} }
/*
* Data copy must complete before initiating the command. This is
* needed for weakly ordered processors (i.e. PowerPC), so that all
* neccessary registers are written before we kick the hardware.
*/
wmb();
/* Setting the valid bit will kick off the command. */ /* Setting the valid bit will kick off the command. */
iowrite32(cmd->op, card->regmap + CREG_CMD); iowrite32(cmd->op, card->regmap + CREG_CMD);
} }
...@@ -399,12 +392,12 @@ static int __issue_creg_rw(struct rsxx_cardinfo *card, ...@@ -399,12 +392,12 @@ static int __issue_creg_rw(struct rsxx_cardinfo *card,
return st; return st;
/* /*
* This timeout is neccessary for unresponsive hardware. The additional * This timeout is necessary for unresponsive hardware. The additional
* 20 seconds to used to guarantee that each cregs requests has time to * 20 seconds to used to guarantee that each cregs requests has time to
* complete. * complete.
*/ */
timeout = msecs_to_jiffies((CREG_TIMEOUT_MSEC * timeout = msecs_to_jiffies(CREG_TIMEOUT_MSEC *
card->creg_ctrl.q_depth) + 20000); card->creg_ctrl.q_depth + 20000);
/* /*
* The creg interface is guaranteed to complete. It has a timeout * The creg interface is guaranteed to complete. It has a timeout
......
...@@ -432,16 +432,6 @@ static void rsxx_issue_dmas(struct work_struct *work) ...@@ -432,16 +432,6 @@ static void rsxx_issue_dmas(struct work_struct *work)
/* Let HW know we've queued commands. */ /* Let HW know we've queued commands. */
if (cmds_pending) { if (cmds_pending) {
/*
* We must guarantee that the CPU writes to 'ctrl->cmd.buf'
* (which is in PCI-consistent system-memory) from the loop
* above make it into the coherency domain before the
* following PIO "trigger" updating the cmd.idx. A WMB is
* sufficient. We need not explicitly CPU cache-flush since
* the memory is a PCI-consistent (ie; coherent) mapping.
*/
wmb();
atomic_add(cmds_pending, &ctrl->stats.hw_q_depth); atomic_add(cmds_pending, &ctrl->stats.hw_q_depth);
mod_timer(&ctrl->activity_timer, mod_timer(&ctrl->activity_timer,
jiffies + DMA_ACTIVITY_TIMEOUT); jiffies + DMA_ACTIVITY_TIMEOUT);
...@@ -798,8 +788,6 @@ static int rsxx_dma_ctrl_init(struct pci_dev *dev, ...@@ -798,8 +788,6 @@ static int rsxx_dma_ctrl_init(struct pci_dev *dev,
iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX); iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX);
iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX); iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX);
wmb();
return 0; return 0;
} }
......
...@@ -27,15 +27,17 @@ ...@@ -27,15 +27,17 @@
/*----------------- IOCTL Definitions -------------------*/ /*----------------- IOCTL Definitions -------------------*/
#define RSXX_MAX_DATA 8
struct rsxx_reg_access { struct rsxx_reg_access {
__u32 addr; __u32 addr;
__u32 cnt; __u32 cnt;
__u32 stat; __u32 stat;
__u32 stream; __u32 stream;
__u32 data[8]; __u32 data[RSXX_MAX_DATA];
}; };
#define RSXX_MAX_REG_CNT (8 * (sizeof(__u32))) #define RSXX_MAX_REG_CNT (RSXX_MAX_DATA * (sizeof(__u32)))
#define RSXX_IOC_MAGIC 'r' #define RSXX_IOC_MAGIC 'r'
......
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