Commit f3ab0527 authored by Bo Shen's avatar Bo Shen Committed by Nicolas Ferre

ARM: at91: add PWM device node

Add PWM device node for AT91 series SoC.
Signed-off-by: default avatarBo Shen <voice.shen@atmel.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent ca594844
...@@ -30,6 +30,7 @@ aliases { ...@@ -30,6 +30,7 @@ aliases {
i2c0 = &i2c0; i2c0 = &i2c0;
ssc0 = &ssc0; ssc0 = &ssc0;
ssc1 = &ssc1; ssc1 = &ssc1;
pwm0 = &pwm0;
}; };
cpus { cpus {
#address-cells = <0>; #address-cells = <0>;
...@@ -575,6 +576,14 @@ spi1: spi@fffa8000 { ...@@ -575,6 +576,14 @@ spi1: spi@fffa8000 {
pinctrl-0 = <&pinctrl_spi1>; pinctrl-0 = <&pinctrl_spi1>;
status = "disabled"; status = "disabled";
}; };
pwm0: pwm@fffb8000 {
compatible = "atmel,at91sam9rl-pwm";
reg = <0xfffb8000 0x300>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
status = "disabled";
};
}; };
fb0: fb@0x00700000 { fb0: fb@0x00700000 {
......
...@@ -37,6 +37,7 @@ aliases { ...@@ -37,6 +37,7 @@ aliases {
i2c1 = &i2c1; i2c1 = &i2c1;
ssc0 = &ssc0; ssc0 = &ssc0;
ssc1 = &ssc1; ssc1 = &ssc1;
pwm0 = &pwm0;
}; };
cpus { cpus {
#address-cells = <0>; #address-cells = <0>;
...@@ -670,6 +671,14 @@ trigger@3 { ...@@ -670,6 +671,14 @@ trigger@3 {
}; };
}; };
pwm0: pwm@fffb8000 {
compatible = "atmel,at91sam9rl-pwm";
reg = <0xfffb8000 0x300>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
status = "disabled";
};
mmc0: mmc@fff80000 { mmc0: mmc@fff80000 {
compatible = "atmel,hsmci"; compatible = "atmel,hsmci";
reg = <0xfff80000 0x600>; reg = <0xfff80000 0x600>;
......
...@@ -33,6 +33,7 @@ aliases { ...@@ -33,6 +33,7 @@ aliases {
i2c0 = &i2c0; i2c0 = &i2c0;
i2c1 = &i2c1; i2c1 = &i2c1;
ssc0 = &ssc0; ssc0 = &ssc0;
pwm0 = &pwm0;
}; };
cpus { cpus {
#address-cells = <0>; #address-cells = <0>;
...@@ -542,6 +543,14 @@ watchdog@fffffe40 { ...@@ -542,6 +543,14 @@ watchdog@fffffe40 {
reg = <0xfffffe40 0x10>; reg = <0xfffffe40 0x10>;
status = "disabled"; status = "disabled";
}; };
pwm0: pwm@f8034000 {
compatible = "atmel,at91sam9rl-pwm";
reg = <0xf8034000 0x300>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
status = "disabled";
};
}; };
nand0: nand@40000000 { nand0: nand@40000000 {
......
...@@ -35,6 +35,7 @@ aliases { ...@@ -35,6 +35,7 @@ aliases {
i2c1 = &i2c1; i2c1 = &i2c1;
i2c2 = &i2c2; i2c2 = &i2c2;
ssc0 = &ssc0; ssc0 = &ssc0;
pwm0 = &pwm0;
}; };
cpus { cpus {
#address-cells = <0>; #address-cells = <0>;
...@@ -762,6 +763,14 @@ rtc@fffffeb0 { ...@@ -762,6 +763,14 @@ rtc@fffffeb0 {
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
status = "disabled"; status = "disabled";
}; };
pwm0: pwm@f8034000 {
compatible = "atmel,at91sam9rl-pwm";
reg = <0xf8034000 0x300>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
status = "disabled";
};
}; };
nand0: nand@40000000 { nand0: nand@40000000 {
......
...@@ -37,6 +37,7 @@ aliases { ...@@ -37,6 +37,7 @@ aliases {
i2c2 = &i2c2; i2c2 = &i2c2;
ssc0 = &ssc0; ssc0 = &ssc0;
ssc1 = &ssc1; ssc1 = &ssc1;
pwm0 = &pwm0;
}; };
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
...@@ -179,6 +180,15 @@ usart1: serial@f0020000 { ...@@ -179,6 +180,15 @@ usart1: serial@f0020000 {
status = "disabled"; status = "disabled";
}; };
pwm0: pwm@f002c000 {
compatible = "atmel,sama5d3-pwm";
reg = <0xf002c000 0x300>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH 4>;
#pwm-cells = <3>;
clocks = <&pwm_clk>;
status = "disabled";
};
isi: isi@f0034000 { isi: isi@f0034000 {
compatible = "atmel,at91sam9g45-isi"; compatible = "atmel,at91sam9g45-isi";
reg = <0xf0034000 0x4000>; reg = <0xf0034000 0x4000>;
......
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