Commit f98121f3 authored by Arnd Bergmann's avatar Arnd Bergmann

arm64: dts: fix build errors from missing dependencies

Two branches were incorrectly sent without having the necessary
header file changes. Rather than back those out now, I'm replacing
the symbolic names for the clks and resets with the numeric
values to get 'make allmodconfig dtbs' back to work.

After the header file changes are merged, we can revert this
patch.

Fixes: 6bc37fac ("arm64: dts: add Allwinner A64 SoC .dtsi")
Fixes: 50784e61 ("dts: arm64: db820c: add pmic pins specific dts file")
Acked-by: default avatarAndre Przywara <andre.przywara@arm.com>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent ba13357e
...@@ -42,10 +42,8 @@ ...@@ -42,10 +42,8 @@
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include <dt-bindings/clock/sun50i-a64-ccu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/sun4i-a10.h> #include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/reset/sun50i-a64-ccu.h>
/ { / {
interrupt-parent = <&gic>; interrupt-parent = <&gic>;
...@@ -137,7 +135,7 @@ pio: pinctrl@1c20800 { ...@@ -137,7 +135,7 @@ pio: pinctrl@1c20800 {
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_PIO>; clocks = <&ccu 58>;
gpio-controller; gpio-controller;
#gpio-cells = <3>; #gpio-cells = <3>;
interrupt-controller; interrupt-controller;
...@@ -160,8 +158,8 @@ uart0: serial@1c28000 { ...@@ -160,8 +158,8 @@ uart0: serial@1c28000 {
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>; clocks = <&ccu 67>;
resets = <&ccu RST_BUS_UART0>; resets = <&ccu 46>;
status = "disabled"; status = "disabled";
}; };
...@@ -171,8 +169,8 @@ uart1: serial@1c28400 { ...@@ -171,8 +169,8 @@ uart1: serial@1c28400 {
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>; clocks = <&ccu 68>;
resets = <&ccu RST_BUS_UART1>; resets = <&ccu 47>;
status = "disabled"; status = "disabled";
}; };
...@@ -182,8 +180,8 @@ uart2: serial@1c28800 { ...@@ -182,8 +180,8 @@ uart2: serial@1c28800 {
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>; clocks = <&ccu 69>;
resets = <&ccu RST_BUS_UART2>; resets = <&ccu 48>;
status = "disabled"; status = "disabled";
}; };
...@@ -193,8 +191,8 @@ uart3: serial@1c28c00 { ...@@ -193,8 +191,8 @@ uart3: serial@1c28c00 {
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART3>; clocks = <&ccu 70>;
resets = <&ccu RST_BUS_UART3>; resets = <&ccu 49>;
status = "disabled"; status = "disabled";
}; };
...@@ -204,8 +202,8 @@ uart4: serial@1c29000 { ...@@ -204,8 +202,8 @@ uart4: serial@1c29000 {
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART4>; clocks = <&ccu 71>;
resets = <&ccu RST_BUS_UART4>; resets = <&ccu 50>;
status = "disabled"; status = "disabled";
}; };
...@@ -213,8 +211,8 @@ i2c0: i2c@1c2ac00 { ...@@ -213,8 +211,8 @@ i2c0: i2c@1c2ac00 {
compatible = "allwinner,sun6i-a31-i2c"; compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2ac00 0x400>; reg = <0x01c2ac00 0x400>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C0>; clocks = <&ccu 63>;
resets = <&ccu RST_BUS_I2C0>; resets = <&ccu 42>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -224,8 +222,8 @@ i2c1: i2c@1c2b000 { ...@@ -224,8 +222,8 @@ i2c1: i2c@1c2b000 {
compatible = "allwinner,sun6i-a31-i2c"; compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b000 0x400>; reg = <0x01c2b000 0x400>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C1>; clocks = <&ccu 64>;
resets = <&ccu RST_BUS_I2C1>; resets = <&ccu 43>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -235,8 +233,8 @@ i2c2: i2c@1c2b400 { ...@@ -235,8 +233,8 @@ i2c2: i2c@1c2b400 {
compatible = "allwinner,sun6i-a31-i2c"; compatible = "allwinner,sun6i-a31-i2c";
reg = <0x01c2b400 0x400>; reg = <0x01c2b400 0x400>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C2>; clocks = <&ccu 65>;
resets = <&ccu RST_BUS_I2C2>; resets = <&ccu 44>;
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
...@@ -9,7 +9,7 @@ ls_exp_gpio_f: pm8916_mpp4 { ...@@ -9,7 +9,7 @@ ls_exp_gpio_f: pm8916_mpp4 {
pinconf { pinconf {
pins = "gpio5"; pins = "gpio5";
output-low; output-low;
power-source = <PM8994_GPIO_S4>; // 1.8V power-source = <2>; // PM8994_GPIO_S4, 1.8V
}; };
}; };
}; };
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