ARM: dts: imx: default to #pwm-cells = <3> in the SoC dtsi files

The imx-pwm driver supports 3 cells and this is the more flexible setting.
So use it by default and overwrite it back to two for the files that
reference the PWMs with just 2 cells to minimize changes.

This allows to drop explicit setting to 3 cells for the boards that already
depend on this. The boards that are now using 2 cells explicitly can be
converted to 3 individually.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arch/arm/boot/dts/imx1.dtsi

@@ -125,7 +125,7 @@ uart2: serial@207000 {
 			};
 
 			pwm: pwm@208000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx1-pwm";
 				reg = <0x00208000 0x1000>;
 				interrupts = <34>;

arch/arm/boot/dts/imx25.dtsi

@@ -411,7 +411,7 @@ gpio4: gpio@53f9c000 {
 
 			pwm2: pwm@53fa0000 {
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				reg = <0x53fa0000 0x4000>;
 				clocks = <&clks 106>, <&clks 52>;
 				clock-names = "ipg", "per";
@@ -430,7 +430,7 @@ gpio3: gpio@53fa4000 {
 
 			pwm3: pwm@53fa8000 {
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				reg = <0x53fa8000 0x4000>;
 				clocks = <&clks 107>, <&clks 52>;
 				clock-names = "ipg", "per";
@@ -488,7 +488,7 @@ slcdc@53fc0000 {
 
 			pwm4: pwm@53fc8000 {
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				reg = <0x53fc8000 0x4000>;
 				clocks = <&clks 108>, <&clks 52>;
 				clock-names = "ipg", "per";
@@ -535,7 +535,7 @@ wdog@53fdc000 {
 
 			pwm1: pwm@53fe0000 {
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				reg = <0x53fe0000 0x4000>;
 				clocks = <&clks 105>, <&clks 52>;
 				clock-names = "ipg", "per";

arch/arm/boot/dts/imx27.dtsi

@@ -134,7 +134,7 @@ gpt3: timer@10005000 {
 			};
 
 			pwm: pwm@10006000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx27-pwm";
 				reg = <0x10006000 0x1000>;
 				interrupts = <23>;

arch/arm/boot/dts/imx31.dtsi

@@ -327,7 +327,7 @@ pwm: pwm@53fe0000 {
 				interrupts = <26>;
 				clocks = <&clks 10>, <&clks 42>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 		};

arch/arm/boot/dts/imx50.dtsi

@@ -289,7 +289,7 @@ iomuxc: iomuxc@53fa8000 {
 			};
 
 			pwm1: pwm@53fb4000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
 				reg = <0x53fb4000 0x4000>;
 				clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
@@ -299,7 +299,7 @@ pwm1: pwm@53fb4000 {
 			};
 
 			pwm2: pwm@53fb8000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx50-pwm", "fsl,imx27-pwm";
 				reg = <0x53fb8000 0x4000>;
 				clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,

arch/arm/boot/dts/imx51-ts4800.dts

@@ -113,6 +113,7 @@ &ipu_di0_disp1 {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm_backlight>;
 	status = "okay";

arch/arm/boot/dts/imx51.dtsi

@@ -400,7 +400,7 @@ iomuxc: iomuxc@73fa8000 {
 			};
 
 			pwm1: pwm@73fb4000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
 				reg = <0x73fb4000 0x4000>;
 				clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
@@ -410,7 +410,7 @@ pwm1: pwm@73fb4000 {
 			};
 
 			pwm2: pwm@73fb8000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx51-pwm", "fsl,imx27-pwm";
 				reg = <0x73fb8000 0x4000>;
 				clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,

arch/arm/boot/dts/imx53-kp.dtsi

@@ -162,6 +162,14 @@ MX53_PAD_EIM_D20__GPIO3_20 0x1e4
 	>;
 };
 
+&pwm1 {
+	#pwm-cells = <2>;
+};
+
+&pwm2 {
+	#pwm-cells = <2>;
+};
+
 &uart1 {
 	status = "okay";
 };

arch/arm/boot/dts/imx53-m53evk.dts

@@ -321,6 +321,7 @@ &ipu_di1_disp1 {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx53-ppd.dts

@@ -624,12 +624,14 @@ &pmu {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
 };
 
 &pwm2 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
 	status = "okay";

arch/arm/boot/dts/imx53-tqma53.dtsi

@@ -209,6 +209,14 @@ MX53_PAD_PATA_CS_1__UART3_RXD_MUX	0x1e4
 	};
 };
 
+&pwm1 {
+	#pwm-cells = <2>;
+};
+
+&pwm2 {
+	#pwm-cells = <2>;
+};
+
 &uart1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_uart1>;

arch/arm/boot/dts/imx53-tx53.dtsi

@@ -542,7 +542,6 @@ &nfc {
 &pwm2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
-	#pwm-cells = <3>;
 };
 
 &sdma {

arch/arm/boot/dts/imx53.dtsi

@@ -525,7 +525,7 @@ port@2 {
 			};
 
 			pwm1: pwm@53fb4000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
 				reg = <0x53fb4000 0x4000>;
 				clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
@@ -535,7 +535,7 @@ pwm1: pwm@53fb4000 {
 			};
 
 			pwm2: pwm@53fb8000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
 				reg = <0x53fb8000 0x4000>;
 				clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>,

arch/arm/boot/dts/imx6dl-aristainetos_4.dts

@@ -79,5 +79,6 @@ &ipu1_di0_disp0 {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	status = "okay";
 };

arch/arm/boot/dts/imx6dl-aristainetos_7.dts

@@ -69,5 +69,6 @@ &ipu1_di0_disp0 {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	status = "okay";
 };

arch/arm/boot/dts/imx6dl-mamoj.dts

@@ -303,6 +303,7 @@ &ipu1_di0_disp0 {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";

arch/arm/boot/dts/imx6dl-yapp4-common.dtsi

@@ -540,7 +540,6 @@ &pcie {
 };
 
 &pwm1 {
-	#pwm-cells = <3>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "disabled";

arch/arm/boot/dts/imx6q-ba16.dtsi

@@ -334,6 +334,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6q-dhcom-pdk2.dts

@@ -253,7 +253,6 @@ &pcie {
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
-	#pwm-cells = <3>;
 	status = "okay";
 };
 

arch/arm/boot/dts/imx6q-display5.dtsi

@@ -399,7 +399,6 @@ lvds0_out: endpoint {
 };
 
 &pwm2 {
-	#pwm-cells = <3>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
 	status = "okay";

arch/arm/boot/dts/imx6q-kp.dtsi

@@ -378,12 +378,14 @@ MX6QDL_PAD_SD4_DAT7__SD4_DATA7		0x17059
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
 };
 
 &pwm2 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
 	status = "okay";

arch/arm/boot/dts/imx6q-mccmon6.dts

@@ -237,7 +237,6 @@ lvds0_out: endpoint {
 };
 
 &pwm2 {
-	#pwm-cells = <3>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
 	status = "okay";

arch/arm/boot/dts/imx6q-novena.dts

@@ -455,6 +455,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	status = "okay";
 };
 

arch/arm/boot/dts/imx6q-pistachio.dts

@@ -570,6 +570,7 @@ lvds0_out: endpoint {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6q-var-dt6customboard.dts

@@ -203,6 +203,7 @@ lvds1_out: endpoint {
 };
 
 &pwm2 {
+	#pwm-cells = <2>;
 	status = "okay";
 };
 

arch/arm/boot/dts/imx6qdl-apalis.dtsi

@@ -371,6 +371,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "disabled";

arch/arm/boot/dts/imx6qdl-apf6dev.dtsi

@@ -211,6 +211,7 @@ &pcie {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi

@@ -336,6 +336,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-colibri.dtsi

@@ -312,6 +312,7 @@ &pwm2 {
 
 /* Colibri PWM<A> */
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "disabled";

arch/arm/boot/dts/imx6qdl-cubox-i.dtsi

@@ -233,6 +233,7 @@ MX6QDL_PAD_EIM_DA8__GPIO3_IO08	0x17059
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	status = "okay";
 };
 

arch/arm/boot/dts/imx6qdl-emcon.dtsi

@@ -737,14 +737,17 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	status = "okay";
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	status = "okay";
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	status = "okay";
 };
 

arch/arm/boot/dts/imx6qdl-gw52xx.dtsi

@@ -365,6 +365,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-gw53xx.dtsi

@@ -356,6 +356,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-gw54xx.dtsi

@@ -419,6 +419,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default", "state_dio";
 	pinctrl-0 = <&pinctrl_pwm4_backlight>;
 	pinctrl-1 = <&pinctrl_pwm4_dio>;

arch/arm/boot/dts/imx6qdl-gw560x.dtsi

@@ -471,6 +471,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-gw5903.dtsi

@@ -365,6 +365,7 @@ timing0: g101evn010 {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-gw5904.dtsi

@@ -401,6 +401,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-icore.dtsi

@@ -245,6 +245,7 @@ mipi_csi2_in: endpoint {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi

@@ -497,6 +497,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
@@ -509,6 +510,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi

@@ -736,12 +736,14 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
 };
 
 &pwm2 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
 	status = "okay";
@@ -754,6 +756,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi

@@ -639,6 +639,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
@@ -651,6 +652,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi

@@ -596,6 +596,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
@@ -608,6 +609,7 @@ &pwm3 {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-phytec-mira.dtsi

@@ -218,6 +218,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-sabreauto.dtsi

@@ -800,6 +800,7 @@ timing0: hsd100pxn1 {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

@@ -687,18 +687,21 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-sabresd.dtsi

@@ -729,6 +729,7 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-savageboard.dtsi

@@ -140,6 +140,7 @@ lvds0_out: endpoint {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6qdl-tx6.dtsi

@@ -738,14 +738,12 @@ MATRIX_KEY(2, 2, KEY_KP9) /* 0x02020049 */
 &pwm1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
-	#pwm-cells = <3>;
 	status = "disabled";
 };
 
 &pwm2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
-	#pwm-cells = <3>;
 	status = "okay";
 };
 

arch/arm/boot/dts/imx6qdl.dtsi

@@ -499,7 +499,7 @@ aipstz@207c000 { /* AIPSTZ1 */
 			};
 
 			pwm1: pwm@2080000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
 				reg = <0x02080000 0x4000>;
 				interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -510,7 +510,7 @@ pwm1: pwm@2080000 {
 			};
 
 			pwm2: pwm@2084000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
 				reg = <0x02084000 0x4000>;
 				interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -521,7 +521,7 @@ pwm2: pwm@2084000 {
 			};
 
 			pwm3: pwm@2088000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
 				reg = <0x02088000 0x4000>;
 				interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -532,7 +532,7 @@ pwm3: pwm@2088000 {
 			};
 
 			pwm4: pwm@208c000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
 				reg = <0x0208c000 0x4000>;
 				interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/imx6sl-evk.dts

@@ -575,6 +575,7 @@ display_out: endpoint {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6sl.dtsi

@@ -334,7 +334,7 @@ uart4: serial@2038000 {
 			};
 
 			pwm1: pwm@2080000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
 				reg = <0x02080000 0x4000>;
 				interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
@@ -344,7 +344,7 @@ pwm1: pwm@2080000 {
 			};
 
 			pwm2: pwm@2084000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
 				reg = <0x02084000 0x4000>;
 				interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
@@ -354,7 +354,7 @@ pwm2: pwm@2084000 {
 			};
 
 			pwm3: pwm@2088000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
 				reg = <0x02088000 0x4000>;
 				interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -364,7 +364,7 @@ pwm3: pwm@2088000 {
 			};
 
 			pwm4: pwm@208c000 {
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				compatible = "fsl,imx6sl-pwm", "fsl,imx27-pwm";
 				reg = <0x0208c000 0x4000>;
 				interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;

arch/arm/boot/dts/imx6sll-evk.dts

@@ -260,6 +260,7 @@ display_out: endpoint {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6sll.dtsi

@@ -321,7 +321,7 @@ pwm1: pwm@2080000 {
 				clocks = <&clks IMX6SLL_CLK_PWM1>,
 					 <&clks IMX6SLL_CLK_PWM1>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm2: pwm@2084000 {
@@ -331,7 +331,7 @@ pwm2: pwm@2084000 {
 				clocks = <&clks IMX6SLL_CLK_PWM2>,
 					 <&clks IMX6SLL_CLK_PWM2>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm3: pwm@2088000 {
@@ -341,7 +341,7 @@ pwm3: pwm@2088000 {
 				clocks = <&clks IMX6SLL_CLK_PWM3>,
 					 <&clks IMX6SLL_CLK_PWM3>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm4: pwm@208c000 {
@@ -351,7 +351,7 @@ pwm4: pwm@208c000 {
 				clocks = <&clks IMX6SLL_CLK_PWM4>,
 					 <&clks IMX6SLL_CLK_PWM4>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			gpt1: timer@2098000 {

arch/arm/boot/dts/imx6sx-nitrogen6sx.dts

@@ -229,6 +229,7 @@ &pcie {
 };
 
 &pwm4 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
 	status = "okay";

arch/arm/boot/dts/imx6sx-sdb.dtsi

@@ -290,6 +290,7 @@ display_out: endpoint {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";

arch/arm/boot/dts/imx6sx-softing-vining-2000.dts

@@ -505,18 +505,21 @@ &pcie {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";
 };
 
 &pwm2 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm2>;
 	status = "okay";
 };
 
 &pwm6 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm6>;
 	status = "okay";

arch/arm/boot/dts/imx6sx.dtsi

@@ -423,7 +423,7 @@ pwm1: pwm@2080000 {
 				clocks = <&clks IMX6SX_CLK_PWM1>,
 					 <&clks IMX6SX_CLK_PWM1>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm2: pwm@2084000 {
@@ -433,7 +433,7 @@ pwm2: pwm@2084000 {
 				clocks = <&clks IMX6SX_CLK_PWM2>,
 					 <&clks IMX6SX_CLK_PWM2>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm3: pwm@2088000 {
@@ -443,7 +443,7 @@ pwm3: pwm@2088000 {
 				clocks = <&clks IMX6SX_CLK_PWM3>,
 					 <&clks IMX6SX_CLK_PWM3>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm4: pwm@208c000 {
@@ -453,7 +453,7 @@ pwm4: pwm@208c000 {
 				clocks = <&clks IMX6SX_CLK_PWM4>,
 					 <&clks IMX6SX_CLK_PWM4>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			flexcan1: can@2090000 {
@@ -1357,7 +1357,7 @@ pwm5: pwm@22a4000 {
 				clocks = <&clks IMX6SX_CLK_PWM5>,
 					 <&clks IMX6SX_CLK_PWM5>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm6: pwm@22a8000 {
@@ -1367,7 +1367,7 @@ pwm6: pwm@22a8000 {
 				clocks = <&clks IMX6SX_CLK_PWM6>,
 					 <&clks IMX6SX_CLK_PWM6>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm7: pwm@22ac000 {
@@ -1377,7 +1377,7 @@ pwm7: pwm@22ac000 {
 				clocks = <&clks IMX6SX_CLK_PWM7>,
 					 <&clks IMX6SX_CLK_PWM7>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 
 			pwm8: pwm@22b0000 {
@@ -1387,7 +1387,7 @@ pwm8: pwm@22b0000 {
 				clocks = <&clks IMX6SX_CLK_PWM8>,
 					 <&clks IMX6SX_CLK_PWM8>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 			};
 		};
 

arch/arm/boot/dts/imx6ul-14x14-evk.dtsi

@@ -228,6 +228,7 @@ display_out: endpoint {
 };
 
 &pwm1 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm1>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-ccimx6ulsbcpro.dts

@@ -168,6 +168,7 @@ &pwm4 {
 };
 
 &pwm5 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm5>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-geam.dts

@@ -195,6 +195,7 @@ timing0: timing0 {
 };
 
 &pwm8 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm8>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-imx6ull-opos6uldev.dtsi

@@ -155,6 +155,7 @@ lcdif_out: endpoint {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-isiot.dtsi

@@ -187,6 +187,7 @@ timing0: timing0 {
 };
 
 &pwm8 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm8>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-kontron-n6310-s-43.dts

@@ -41,6 +41,7 @@ &lcdif {
 };
 
 &pwm7 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm7>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi

@@ -153,6 +153,7 @@ rtc@32 {
 };
 
 &pwm8 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm8>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-pico.dtsi

@@ -175,6 +175,7 @@ display_out: endpoint {
 };
 
 &pwm3 {
+	#pwm-cells = <2>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm3>;
 	status = "okay";

arch/arm/boot/dts/imx6ul-tx6ul.dtsi

@@ -549,7 +549,6 @@ ETQ570 {
 &pwm5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm5>;
-	#pwm-cells = <3>;
 	status = "okay";
 };
 

arch/arm/boot/dts/imx6ul.dtsi

@@ -386,7 +386,7 @@ pwm1: pwm@2080000 {
 				clocks = <&clks IMX6UL_CLK_PWM1>,
 					 <&clks IMX6UL_CLK_PWM1>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -397,7 +397,7 @@ pwm2: pwm@2084000 {
 				clocks = <&clks IMX6UL_CLK_PWM2>,
 					 <&clks IMX6UL_CLK_PWM2>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -408,7 +408,7 @@ pwm3: pwm@2088000 {
 				clocks = <&clks IMX6UL_CLK_PWM3>,
 					 <&clks IMX6UL_CLK_PWM3>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -419,7 +419,7 @@ pwm4: pwm@208c000 {
 				clocks = <&clks IMX6UL_CLK_PWM4>,
 					 <&clks IMX6UL_CLK_PWM4>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -759,7 +759,7 @@ pwm5: pwm@20f0000 {
 				clocks = <&clks IMX6UL_CLK_PWM5>,
 					 <&clks IMX6UL_CLK_PWM5>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -770,7 +770,7 @@ pwm6: pwm@20f4000 {
 				clocks = <&clks IMX6UL_CLK_PWM6>,
 					 <&clks IMX6UL_CLK_PWM6>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -781,7 +781,7 @@ pwm7: pwm@20f8000 {
 				clocks = <&clks IMX6UL_CLK_PWM7>,
 					 <&clks IMX6UL_CLK_PWM7>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 
@@ -792,7 +792,7 @@ pwm8: pwm@20fc000 {
 				clocks = <&clks IMX6UL_CLK_PWM8>,
 					 <&clks IMX6UL_CLK_PWM8>;
 				clock-names = "ipg", "per";
-				#pwm-cells = <2>;
+				#pwm-cells = <3>;
 				status = "disabled";
 			};
 		};

arch/arm/boot/dts/imx6ull-colibri.dtsi

@@ -145,25 +145,21 @@ &lcdif {
 &pwm4 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm4>;
-	#pwm-cells = <3>;
 };
 
 &pwm5 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm5>;
-	#pwm-cells = <3>;
 };
 
 &pwm6 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm6>;
-	#pwm-cells = <3>;
 };
 
 &pwm7 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_pwm7>;
-	#pwm-cells = <3>;
 };
 
 &sdma {