Commit fb1e7760 authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt

sh: fix sh7724 SDHI support using INTC force_disable

Update the sh7724 INTC tables with force_enable support
to mask out pending unsupported SDHI interrupt sources.

Without this patch the kernel locks up due to a pending
SDHI interrupt that the tmio_mmc driver cannot handle.
Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent d85429a3
...@@ -724,6 +724,7 @@ void l2_cache_init(void) ...@@ -724,6 +724,7 @@ void l2_cache_init(void)
enum { enum {
UNUSED = 0, UNUSED = 0,
ENABLED, ENABLED,
DISABLED,
/* interrupt sources */ /* interrupt sources */
IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
...@@ -890,7 +891,7 @@ static struct intc_group groups[] __initdata = { ...@@ -890,7 +891,7 @@ static struct intc_group groups[] __initdata = {
static struct intc_mask_reg mask_registers[] __initdata = { static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
{ 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
0, 0, ENABLED, ENABLED } }, 0, DISABLED, ENABLED, ENABLED } },
{ 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
{ VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0,
DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } },
...@@ -912,7 +913,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { ...@@ -912,7 +913,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
{ I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } },
{ 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
{ 0, 0, ENABLED, ENABLED, { DISABLED, DISABLED, ENABLED, ENABLED,
0, 0, SCIFA5, FSI } }, 0, 0, SCIFA5, FSI } },
{ 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
{ 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, { 0, 0, 0, CMT, 0, USB1, USB0, 0 } },
...@@ -962,6 +963,7 @@ static struct intc_mask_reg ack_registers[] __initdata = { ...@@ -962,6 +963,7 @@ static struct intc_mask_reg ack_registers[] __initdata = {
static struct intc_desc intc_desc __initdata = { static struct intc_desc intc_desc __initdata = {
.name = "sh7724", .name = "sh7724",
.force_enable = ENABLED, .force_enable = ENABLED,
.force_disable = DISABLED,
.hw = INTC_HW_DESC(vectors, groups, mask_registers, .hw = INTC_HW_DESC(vectors, groups, mask_registers,
prio_registers, sense_registers, ack_registers), prio_registers, sense_registers, ack_registers),
}; };
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment