Commit fd75cb51 authored by Bharat Bhushan's avatar Bharat Bhushan Committed by Alexander Graf

kvm: powerpc: allow guest control "E" attribute in mas2

"E" bit in MAS2 bit indicates whether the page is accessed
in Little-Endian or Big-Endian byte order.
There is no reason to stop guest setting  "E", so allow him."
Signed-off-by: default avatarBharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent c199efa2
...@@ -117,7 +117,7 @@ static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu) ...@@ -117,7 +117,7 @@ static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
#define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW) #define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
#define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW) #define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
#define MAS2_ATTRIB_MASK \ #define MAS2_ATTRIB_MASK \
(MAS2_X0 | MAS2_X1) (MAS2_X0 | MAS2_X1 | MAS2_E)
#define MAS3_ATTRIB_MASK \ #define MAS3_ATTRIB_MASK \
(MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \ (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
| E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK) | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
......
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