Commit fda9b7af authored by Wojciech Dubowik's avatar Wojciech Dubowik Committed by John W. Linville

ath5k: Fix return codes for eeprom read functions.

Eeprom read functions are of bool type and not int.
Signed-off-by: default avatarWojciech Dubowik <Wojciech.Dubowik@neratec.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 8b3f4616
...@@ -31,7 +31,8 @@ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz) ...@@ -31,7 +31,8 @@ static void ath5k_ahb_read_cachesize(struct ath_common *common, int *csz)
*csz = L1_CACHE_BYTES >> 2; *csz = L1_CACHE_BYTES >> 2;
} }
bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) static bool
ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
{ {
struct ath5k_softc *sc = common->priv; struct ath5k_softc *sc = common->priv;
struct platform_device *pdev = to_platform_device(sc->dev); struct platform_device *pdev = to_platform_device(sc->dev);
...@@ -46,10 +47,10 @@ bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data) ...@@ -46,10 +47,10 @@ bool ath5k_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
eeprom += off; eeprom += off;
if (eeprom > eeprom_end) if (eeprom > eeprom_end)
return -EINVAL; return false;
*data = *eeprom; *data = *eeprom;
return 0; return true;
} }
int ath5k_hw_read_srev(struct ath5k_hw *ah) int ath5k_hw_read_srev(struct ath5k_hw *ah)
......
...@@ -72,7 +72,6 @@ static int ...@@ -72,7 +72,6 @@ static int
ath5k_eeprom_init_header(struct ath5k_hw *ah) ath5k_eeprom_init_header(struct ath5k_hw *ah)
{ {
struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
int ret;
u16 val; u16 val;
u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX; u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX;
...@@ -192,7 +191,7 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset, ...@@ -192,7 +191,7 @@ static int ath5k_eeprom_read_ants(struct ath5k_hw *ah, u32 *offset,
struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
u32 o = *offset; u32 o = *offset;
u16 val; u16 val;
int ret, i = 0; int i = 0;
AR5K_EEPROM_READ(o++, val); AR5K_EEPROM_READ(o++, val);
ee->ee_switch_settling[mode] = (val >> 8) & 0x7f; ee->ee_switch_settling[mode] = (val >> 8) & 0x7f;
...@@ -252,7 +251,6 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset, ...@@ -252,7 +251,6 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
u32 o = *offset; u32 o = *offset;
u16 val; u16 val;
int ret;
ee->ee_n_piers[mode] = 0; ee->ee_n_piers[mode] = 0;
AR5K_EEPROM_READ(o++, val); AR5K_EEPROM_READ(o++, val);
...@@ -515,7 +513,6 @@ ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max, ...@@ -515,7 +513,6 @@ ath5k_eeprom_read_freq_list(struct ath5k_hw *ah, int *offset, int max,
int o = *offset; int o = *offset;
int i = 0; int i = 0;
u8 freq1, freq2; u8 freq1, freq2;
int ret;
u16 val; u16 val;
ee->ee_n_piers[mode] = 0; ee->ee_n_piers[mode] = 0;
...@@ -551,7 +548,7 @@ ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset) ...@@ -551,7 +548,7 @@ ath5k_eeprom_init_11a_pcal_freq(struct ath5k_hw *ah, int offset)
{ {
struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
struct ath5k_chan_pcal_info *pcal = ee->ee_pwr_cal_a; struct ath5k_chan_pcal_info *pcal = ee->ee_pwr_cal_a;
int i, ret; int i;
u16 val; u16 val;
u8 mask; u8 mask;
...@@ -970,7 +967,6 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode) ...@@ -970,7 +967,6 @@ ath5k_eeprom_read_pcal_info_5112(struct ath5k_hw *ah, int mode)
u32 offset; u32 offset;
u8 i, c; u8 i, c;
u16 val; u16 val;
int ret;
u8 pd_gains = 0; u8 pd_gains = 0;
/* Count how many curves we have and /* Count how many curves we have and
...@@ -1228,7 +1224,7 @@ ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode) ...@@ -1228,7 +1224,7 @@ ath5k_eeprom_read_pcal_info_2413(struct ath5k_hw *ah, int mode)
struct ath5k_chan_pcal_info *chinfo; struct ath5k_chan_pcal_info *chinfo;
u8 *pdgain_idx = ee->ee_pdc_to_idx[mode]; u8 *pdgain_idx = ee->ee_pdc_to_idx[mode];
u32 offset; u32 offset;
int idx, i, ret; int idx, i;
u16 val; u16 val;
u8 pd_gains = 0; u8 pd_gains = 0;
...@@ -1419,7 +1415,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode) ...@@ -1419,7 +1415,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode)
u8 *rate_target_pwr_num; u8 *rate_target_pwr_num;
u32 offset; u32 offset;
u16 val; u16 val;
int ret, i; int i;
offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1); offset = AR5K_EEPROM_TARGET_PWRSTART(ee->ee_misc1);
rate_target_pwr_num = &ee->ee_rate_target_pwr_num[mode]; rate_target_pwr_num = &ee->ee_rate_target_pwr_num[mode];
...@@ -1593,7 +1589,7 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah) ...@@ -1593,7 +1589,7 @@ ath5k_eeprom_read_ctl_info(struct ath5k_hw *ah)
struct ath5k_edge_power *rep; struct ath5k_edge_power *rep;
unsigned int fmask, pmask; unsigned int fmask, pmask;
unsigned int ctl_mode; unsigned int ctl_mode;
int ret, i, j; int i, j;
u32 offset; u32 offset;
u16 val; u16 val;
...@@ -1733,16 +1729,12 @@ int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac) ...@@ -1733,16 +1729,12 @@ int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
u8 mac_d[ETH_ALEN] = {}; u8 mac_d[ETH_ALEN] = {};
u32 total, offset; u32 total, offset;
u16 data; u16 data;
int octet, ret; int octet;
ret = ath5k_hw_nvram_read(ah, 0x20, &data); AR5K_EEPROM_READ(0x20, data);
if (ret)
return ret;
for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) { for (offset = 0x1f, octet = 0, total = 0; offset >= 0x1d; offset--) {
ret = ath5k_hw_nvram_read(ah, offset, &data); AR5K_EEPROM_READ(offset, data);
if (ret)
return ret;
total += data; total += data;
mac_d[octet + 1] = data & 0xff; mac_d[octet + 1] = data & 0xff;
......
...@@ -241,9 +241,8 @@ enum ath5k_eeprom_freq_bands{ ...@@ -241,9 +241,8 @@ enum ath5k_eeprom_freq_bands{
#define AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz 6250 #define AR5K_SPUR_SYMBOL_WIDTH_TURBO_100Hz 6250
#define AR5K_EEPROM_READ(_o, _v) do { \ #define AR5K_EEPROM_READ(_o, _v) do { \
ret = ath5k_hw_nvram_read(ah, (_o), &(_v)); \ if (!ath5k_hw_nvram_read(ah, (_o), &(_v))) \
if (ret) \ return -EIO; \
return ret; \
} while (0) } while (0)
#define AR5K_EEPROM_READ_HDR(_o, _v) \ #define AR5K_EEPROM_READ_HDR(_o, _v) \
......
...@@ -69,7 +69,8 @@ static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz) ...@@ -69,7 +69,8 @@ static void ath5k_pci_read_cachesize(struct ath_common *common, int *csz)
/* /*
* Read from eeprom * Read from eeprom
*/ */
bool ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data) static bool
ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
{ {
struct ath5k_hw *ah = (struct ath5k_hw *) common->ah; struct ath5k_hw *ah = (struct ath5k_hw *) common->ah;
u32 status, timeout; u32 status, timeout;
...@@ -90,15 +91,15 @@ bool ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data) ...@@ -90,15 +91,15 @@ bool ath5k_pci_eeprom_read(struct ath_common *common, u32 offset, u16 *data)
status = ath5k_hw_reg_read(ah, AR5K_EEPROM_STATUS); status = ath5k_hw_reg_read(ah, AR5K_EEPROM_STATUS);
if (status & AR5K_EEPROM_STAT_RDDONE) { if (status & AR5K_EEPROM_STAT_RDDONE) {
if (status & AR5K_EEPROM_STAT_RDERR) if (status & AR5K_EEPROM_STAT_RDERR)
return -EIO; return false;
*data = (u16)(ath5k_hw_reg_read(ah, AR5K_EEPROM_DATA) & *data = (u16)(ath5k_hw_reg_read(ah, AR5K_EEPROM_DATA) &
0xffff); 0xffff);
return 0; return true;
} }
udelay(15); udelay(15);
} }
return -ETIMEDOUT; return false;
} }
int ath5k_hw_read_srev(struct ath5k_hw *ah) int ath5k_hw_read_srev(struct ath5k_hw *ah)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment