- 26 Mar, 2018 40 commits
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David S. Miller authored
Kirill Tkhai says: ==================== Converting pernet_operations (part #7.1) this is a resending of the 4 patches from path #7. Anna kindly reviewed them and suggested to take the patches through net tree, since there is pernet_operations::async only in net-next.git. There is Anna's acks on every header, the rest of patch has no changes. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Kirill Tkhai authored
These pernet_operations create and destroy per-net pipe and dentry, and they seem safe to be marked as async. Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com> Acked-by: Anna Schumaker <Anna.Schumaker@netapp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Kirill Tkhai authored
These pernet_operations look similar to rpcsec_gss_net_ops, they just create and destroy another cache. Also they create and destroy directory. So, they also look safe to be async. Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com> Acked-by: Anna Schumaker <Anna.Schumaker@netapp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Kirill Tkhai authored
These pernet_operations look similar to rpcsec_gss_net_ops, they just create and destroy another caches. So, they also can be async. Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com> Acked-by: Anna Schumaker <Anna.Schumaker@netapp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Kirill Tkhai authored
These pernet_operations initialize and destroy sunrpc_net_id refered per-net items. Only used global list is cache_list, and accesses already serialized. sunrpc_destroy_cache_detail() check for list_empty() without cache_list_lock, but when it's called from unregister_pernet_subsys(), there can't be callers in parallel, so we won't miss list_empty() in this case. Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com> Acked-by: Anna Schumaker <Anna.Schumaker@netapp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Pieter Jansen van Vuuren says: ==================== nfp: flower: add ip fragmentation offloading support This set allows offloading IP fragmentation classification. It Implements ip fragmentation match offloading for both IPv4 and IPv6 and offloads frag, nofrag, first and nofirstfrag classification. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Pieter Jansen van Vuuren authored
Implement ip fragmentation match offloading for both IPv4 and IPv6. Allows offloading frag, nofrag, first and nofirstfrag classification. Signed-off-by: Pieter Jansen van Vuuren <pieter.jansenvanvuuren@netronome.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Pieter Jansen van Vuuren authored
Refactored shared ip header code for IPv4 and IPv6 in match offload. Signed-off-by: Pieter Jansen van Vuuren <pieter.jansenvanvuuren@netronome.com> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com> Signed-off-by: Simon Horman <simon.horman@netronome.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Sinan Kaya says: ==================== netdev: Eliminate duplicate barriers on weakly-ordered archs Code includes wmb() followed by writel() in multiple places. writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). I did a regex search for wmb() followed by writel() in each drivers directory. I scrubbed the ones I care about in this series. I considered "ease of change", "popular usage" and "performance critical path" as the determining criteria for my filtering. We used relaxed API heavily on ARM for a long time but it did not exist on other architectures. For this reason, relaxed architectures have been paying double penalty in order to use the common drivers. Now that relaxed API is present on all architectures, we can go and scrub all drivers to see what needs to change and what can remain. We start with mostly used ones and hope to increase the coverage over time. It will take a while to cover all drivers. Feel free to apply patches individually. Changes since v6: - bring back amazon ena and add mmiowb, remove ena_com_write_sq_doorbell_rel(). - remove extra mmiowb in bnx2x - correct spelling mistake in bnx2x: Replace doorbell barrier() with wmb() ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Sinan Kaya authored
Code includes barrier() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Create a new wrapper function with relaxed write operator. Use the new wrapper when a write is following a barrier(). Since code already has an explicit barrier call, changing writel() to writel_relaxed() and adding mmiowb() for ordering protection. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sinan Kaya authored
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Create a new wrapper function with relaxed write operator. Use the new wrapper when a write is following a wmb(). Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Also add mmiowb() so that write code doesn't move outside of scope. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Acked-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sinan Kaya authored
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Create a new wrapper function with relaxed write operator. Use the new wrapper when a write is following a wmb(). Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sinan Kaya authored
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sinan Kaya authored
barrier() doesn't guarantee memory writes to be observed by the hardware on all architectures. barrier() only tells compiler not to move this code with respect to other read/writes. If memory write needs to be observed by the HW, wmb() is the right choice. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sinan Kaya authored
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Acked-by: Manish Chopra <manish.chopra@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sinan Kaya authored
Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing code to wmb() writel_relaxed() mmiowb() for multi-arch support. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Sergei Shtylyov says: ==================== sh_eth: unify the SoC feature checks Here's a set of 5 patches against DaveM's 'net-next.git' repo. The Ether driver sometimes uses the bit fields in 'struct sh_eth_cpu_data' to check which Ether registers exist in a certain SoC and sometimes it uses sh_eth_is_{gether|rz_fast_ether}() which basically compares 2 pointers (1 of them being constant) -- the latter is definitely not a strongest feature of the RISC CPUs (be it SH or ARM), so I decided to get rid of this type of the feature checks in favour of the bit fields (I've also made use of a 32-bit value and method pointer where appropriate)... [1/5] sh_eth: add sh_eth_cpu_data::soft_reset() method [2/5] sh_eth: add sh_eth_cpu_data::edtrr_trns value [3/5] sh_eth: add sh_eth_cpu_data::xdfar_rw flag [4/5] sh_eth: add sh_eth_cpu_data::no_tx_cntr flag [5/5] sh_eth: add sh_eth_cpu_data::cexcr flag ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Sergei Shtylyov authored
GEther controllers have CERCR/CEECR instead of CNDCR on the others. Currently we are calling sh_eth_is_gether() in order to check for this, however it would be simpler to check the new 'cexcr' bitfield in the 'struct sh_eth_cpu_data'; then we'd be able to remove sh_eth_is_gether() as there would be no callers left... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sergei Shtylyov authored
RZ/A1H (R7S72100) Ether controller doesn't seem to have the TX counter registers like TROCR/CDCR/LCCR (or at least they are still undocumented like some TSU registers), so we bail out of sh_eth_get_stats() early in this case. Currently we are calling sh_eth_is_rz_fast_ether() in order to check for this, but it would be simpler to check the new 'no_tx_cntrs' bitfield in the 'struct sh_eth_cpu_data'; then we'd be able to remove sh_eth_is_rz_fast_ether() as there would be no callers left... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sergei Shtylyov authored
The GEther-like controllers have writeable RDFAR/TDFAR, on the others they are read-only or just absent (on R-Car). Currently we are calling sh_eth_is_{gether|rz_fast_ether}() in order to check if these registers can be written to, however it would be simpler to check the new 'xdfar_rw' bitfield in the 'struct sh_eth_cpu_data'... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sergei Shtylyov authored
sh_eth_get_edtrr_trns() returns the value to be written to EDTRR in order to start TX DMA -- this value is different between the GEther-like and the other controllers. We can replace this function (and thus get rid of the calls to sh_eth_is_{gether|rz_fast_ether}() by it) with a new field 'edtrr_trns' in the 'struct sh_eth_cpu_data'. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Sergei Shtylyov authored
sh_eth_reset() performs a software reset which is implemented in a completely different way for the GEther-like controllers vs the other controllers due to a different layout of EDMR (and other factors) -- it therefore makes sense to convert this function to a mandatory sh_eth_cpu_data::soft_reset() method and thus get rid of the runtime controller type check via sh_eth_is_{gether|rz_fast_ether}(). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Richard Cochran authored
Ever since commit 3a06c7ac ("posix-clocks: Remove interval timer facility and mmap/fasync callbacks") the possibility of PHC based posix timers has been removed. In addition it will probably never make sense to implement this functionality. This patch removes the misleading text which seems to suggest that posix timers for PHC devices will ever be a thing. Signed-off-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Peng Li says: ==================== fix some bugs for HNS3 This patchset fixes some bugs for HNS3 driver: [Patch 1/5 - 2/5] fix 2 return vlaue issues. [Patch 3/5 - 4/5] fix 2 comments reported by code review. [Ptach 5/5] avoid sending message to IMP because IMP will not handle any message when it is resetting. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Peng Li authored
IMP will not handle and command queue message any more when it is in core/global, driver should not send command queue message to IMP until reinitialize the NIC HW. This patch checks the status and avoid the message sent to IMP when reset. Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Fuyun Liang authored
Default rss_hash_key value should be given to all vports. But just the PF rss_hash_key has the default value here. This patch adds rss_hash_key Initialization for all vports. Signed-off-by: Fuyun Liang <liangfuyun1@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Fuyun Liang authored
Third parameter of hnae_set_field is shift, But a mask is given. This patch fixes it by replacing HNS3_TXD_BDTYPE_M with HNS3_TXD_BDTYPE_S. Signed-off-by: Fuyun Liang <liangfuyun1@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Fuyun Liang authored
The return type of hns3_get_rss_indir_size is u32. But a negative value is returned. This patch fixes it by replacing the negative value with zero. Signed-off-by: Fuyun Liang <liangfuyun1@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Fuyun Liang authored
The return type of hns3_get_rss_key_size is u32. But a negative value is returned. This patch fixes it by replacing the negative value with zero. Signed-off-by: Fuyun Liang <liangfuyun1@huawei.com> Signed-off-by: Peng Li <lipeng321@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Colin Ian King authored
The call to rmnet_get_endpoint can potentially return NULL so check for this to avoid any subsequent null pointer dereferences on a NULL ep. Detected by CoverityScan, CID#1465385 ("Dereference null return value") Fixes: 23790ef1 ("net: qualcomm: rmnet: Allow to configure flags for existing devices") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Joe Perches authored
Prefer the direct use of octal for permissions. Done with checkpatch -f --types=SYMBOLIC_PERMS --fix-inplace and some typing. Miscellanea: o Whitespace neatening around these conversions. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Joe Perches authored
Prefer the direct use of octal for permissions. Done with checkpatch -f --types=SYMBOLIC_PERMS --fix-inplace and some typing. Miscellanea: o Whitespace neatening around these conversions. Signed-off-by: Joe Perches <joe@perches.com> Reviewed-by: Wei Liu <wei.liu2@citrix.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Joe Perches authored
Prefer the direct use of octal for permissions. Done with checkpatch -f --types=SYMBOLIC_PERMS --fix-inplace and some typing. Miscellanea: o Whitespace neatening around these conversions. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Kirill Tkhai says: ==================== Drop NETDEV_UNREGISTER_FINAL (was unnamed) This series drops unused NETDEV_UNREGISTER_FINAL after some preparations. v2: New patch [2/3]. Use switch() in [1/3]. The first version was acked by Jason Gunthorpe, and [1/3] was acked by David Ahern. Since there are differences to v1, I haven't added Acked-by tags of people. It would be nice, if you fill OK to tag v2 too. ==================== Acked-by: Jason Gunthorpe <jgg@mellanox> Signed-off-by: David S. Miller <davem@davemloft.net>
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Kirill Tkhai authored
Last user is gone after bdf5bd7f "rds: tcp: remove register_netdevice_notifier infrastructure.", so we can remove this netdevice command. This allows to delete rtnl_lock() in netdev_run_todo(), which is hot path for net namespace unregistration. dev_change_net_namespace() and netdev_wait_allrefs() have rcu_barrier() before NETDEV_UNREGISTER_FINAL call, and the source commits say they were introduced to delemit the call with NETDEV_UNREGISTER, but this patch leaves them on the places, since they require additional analysis, whether we need in them for something else. Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Kirill Tkhai authored
This function just calls netdev_cmd_to_name(). Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Kirill Tkhai authored
This patch is preparation to drop NETDEV_UNREGISTER_FINAL. Since the cmd is used in usnic_ib_netdev_event_to_string() to get cmd name, after plain removing NETDEV_UNREGISTER_FINAL from everywhere, we'd have holes in event2str[] in this function. Instead of that, let's make NETDEV_XXX commands names available for everyone, and to define netdev_cmd_to_name() in the way we won't have to shaffle names after their numbers are changed. Signed-off-by: Kirill Tkhai <ktkhai@virtuozzo.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Madalin Bucur authored
The platform device is no longer used for DMA mapping so the (questionable) setting of the DMA ops done here is no longer needed. Removing it together with the HAS_DMA dependency that it required. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Kunihiko Hayashi says: ==================== net: ethernet: ave: add UniPhier PXs3 support Add ethernet controller support on UniPhier PXs3 SoC. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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Kunihiko Hayashi authored
Add a compatible string and SoC data for ethernet controller on UniPhier PXs3 SoC. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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