Commits · 173247569a95a63daa1a28b4c7e2c7d02a89d1a3 · nexedi / linux

08 Aug, 2016 40 commits

drm/amd/powerplay: change structure variable name. · 17324756

Rex Zhu authored Aug 01, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

17324756

drm/amd/powerplay: delete code set/unset deep_sleep/power_containment. · 29425288

Rex Zhu authored Aug 03, 2016

they were controled by module parameter.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

29425288

drm/amdgpu: enable VCE soft reset · bde1d8b2

Chunming Zhou authored Aug 03, 2016

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

bde1d8b2

drm/amdgpu: remove RB1_BUSY bit checking · ac8e3f30

Rex Zhu authored Aug 03, 2016

This is a workaround to let VCE soft reset work.
RB1_BUSY bit is always set, so remove its checking now, and we
will depend on RB0_BUSY currently.
After we find the root cause of RB1_BUSY, we can add it back.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

ac8e3f30

drm/amdgpu: fix harvest config checking in vce3 check_soft_reset · 9c0171b4

Chunming Zhou authored Aug 03, 2016

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

9c0171b4

drm/amdgpu: irq resume should be immediately after gpu resume · e72cfd58

Chunming Zhou authored Jul 27, 2016

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e72cfd58

drm/amd/amdgpu: Partially revert change to UVD v3 CG · 568ba157

Tom St Denis authored Aug 03, 2016

Partially undo changes made by commit:

drm/amd/amdgpu: don't track state in UVD clockgating

To keep bypass even if CG flags are not set.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

568ba157

drm/amd/amdgpu: Enable VCE MGCG for Stoney · 8ef583e9

Tom St Denis authored Aug 03, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8ef583e9

drm/amd/amdgpu: Enable VCE MGCG for Carrizo · 1af69a2c

Tom St Denis authored Aug 03, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1af69a2c

drm/amd/amdgpu: Don't set VCE CG in startup · 13d58d2a

Tom St Denis authored Aug 03, 2016

It's handled by DPM/PP properly.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

13d58d2a

drm/amd/amdgpu: Fix VCE CG order and resume defaults · 6f906814

Tom St Denis authored Aug 03, 2016

CG was being enabled in reverse sense from dpm/powerplay.
Also fix the default CLK_EN signal to enable all of the blocks.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

6f906814

drm/amd/amdgpu: fix indentation in vce3 CG · f16fe6d3

Tom St Denis authored Aug 03, 2016

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

f16fe6d3

drm/amdgpu: remove the check for sessions being closed · 713c0021

Leo Liu authored Aug 03, 2016

This will make clock and power gated when no block decoded, for example
when paused during the playback.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

713c0021

drm/amdgpu: print more accurate error messages on IB submission failure · f1037950

Marek Olšák authored Jul 30, 2016

It's useful for debugging.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

f1037950

drm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu · a693e050

Ken Wang authored Jul 27, 2016

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

a693e050

drm/ttm: Add interface to export kernel_zone max memory size in ttm · ecf6a637

Ken Wang authored Jul 27, 2016

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

ecf6a637

drm/amd/powrplay: delete code no longer in use on Polaris. · 8e9fc800

Rex Zhu authored Jul 31, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8e9fc800

drm/amd/powrplay: workaround Memory EDC Error for certain partner boards. · 6391b6ab

Rex Zhu authored Jul 29, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

6391b6ab

drm/amdgpu: AMD SW workaround for certain partner boards · 5765a36d

Rex Zhu authored Jul 29, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

5765a36d

drm/amd/powerplay: pass sub_device_id and sub_vendor_id to powerplay. · 93bdacd1

Rex Zhu authored Jul 29, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

93bdacd1

drm/amd/powerplay: delete useless code in hwmgr. · 08bd8b9f

Rex Zhu authored Jul 29, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

08bd8b9f

drm/amdgpu: expose AMDGPU_GEM_CREATE_VRAM_CLEARED to user space · 4fea83ff

Flora Cui authored Jul 20, 2016

V2: fix the return value for fill failure and validate bo before
filling data
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4fea83ff

drm/amdgpu: implement amdgpu_fill_buffer() · 59b4a977

Flora Cui authored Jul 19, 2016

so that bo could be set to some pattern
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

59b4a977

drm/amdgpu/gfx8: remove stale function declaration · 30988909

Alex Deucher authored Aug 01, 2016

This got leftover somehow when I cleaned this up.
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

30988909

drm/amd/amdgpu: change pptable output format from ASCII to binary · 1684d3ba

Eric Huang authored Jul 28, 2016

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1684d3ba

drm/amdgpu/ci: add mullins to default case for smc ucode · b9a8be95

Alex Deucher authored Jul 29, 2016

It's already covered by the default case, but add it for
consistency.
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b9a8be95

drm/amdgpu/gmc7: add missing mullins case · b62774fc

Alex Deucher authored Jul 29, 2016

Looks like this got missed when we ported the code from radeon.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org

b62774fc

drm/amdgpu: use modules parameter to ctrl deep sleep feature in dpm · 66bc3f7f

Rex Zhu authored Jul 28, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

66bc3f7f

drm/amdgpu: add module parameters to ctrl powerplay feature · af223dfa

Rex Zhu authored Jul 28, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

af223dfa

drm/amd/powerplay: fix typos of volt/millivolt symbols in comment. · a94cbfc3

Rex Zhu authored Jul 07, 2016

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

a94cbfc3

drm/amd/amdgpu: Enable stoney VCE PG · 75419c43

Tom St Denis authored Jul 28, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

75419c43

drm/amd/amdgpu: Enable stoney UVD PG · c2cdb042

Tom St Denis authored Jul 28, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c2cdb042

drm/amd/amdgpu: Enable stoney GFX PG · 4e86be75

Tom St Denis authored Jul 28, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4e86be75

drm/amd/amdgpu: Enable carrizo VCE PG · 2ed0936d

Tom St Denis authored Jul 28, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2ed0936d

drm/amd/amdgpu: Enable carrizo UVD PG · 65b42622

Tom St Denis authored Jul 28, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

65b42622

drm/amd/amdgpu: Enable carrizo GFX PG · f6ade304

Tom St Denis authored Jul 28, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

f6ade304

drm/amd/amdgpu: Add error messages to UVD PG in DPM · 0da31ffc

Tom St Denis authored Jul 28, 2016

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

0da31ffc

drm/amd/amdgpu: enable PG_EN bit in powergating UVD · fa5d2e0c

Tom St Denis authored Jul 28, 2016

Enable the PG_EN bit just before the SMU would be tasked
with the PG transition.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

fa5d2e0c

drm/amd/amdgpu: don't track state in UVD clockgating · 2875125c

Tom St Denis authored Jul 28, 2016

There's no need to track CG state anymore.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2875125c

drm/amd/amdgpu: don't set clockgating in uvd_v6_0_start() · 7acc83d4

Tom St Denis authored Jul 28, 2016

This is handled properly by both DPM and PP externally.
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

7acc83d4