- 01 Nov, 2011 1 commit
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Mark Brown authored
Since we have code to automatically manage the start and stop of the FLL based on the SYSCLK widget if SYSCLK is already enabled and the FLL is configured then we need to start it up. Signed-off-by:Mark Brown <broonie@opensource.wolfsonmicro.com>
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- 31 Oct, 2011 12 commits
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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- 27 Oct, 2011 2 commits
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ramesh.babu@linux.intel.com authored
With this flag, each dai_link in machine driver can choose to ignore pmdown_time during DAPM shut down sequence. If the ignore_pmdown_time is set, the DAPM for corresponding DAI will be executed immediately. Signed-off-by:
Ramesh Babu K V <ramesh.babu@linux.intel.com> Signed-off-by:
Vinod Koul <vinod.koul@linux.intel.com> Acked-by:
Liam Girdwood <lrg@ti.com> Signed-off-by:
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
Axel Lin <axel.lin@gmail.com> Acked-by:
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- 24 Oct, 2011 4 commits
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Axel Lin authored
The registers are 16 bits, thus remove an extra F for the mask. Signed-off-by:
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Axel Lin authored
According to the datasheet: The PLL Output clock division ratio is controlled by BIT[5:4] of WM8940_GPIO register(08h). Current code read/write the WM8940_ADDCNTRL(07h) register which is wrong. Signed-off-by:
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Axel Lin authored
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Axel Lin authored
What we want here is to clear the WM8400_FLL_OUTDIV_MASK bits then OR with factors.outdiv. Signed-off-by:
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- 22 Oct, 2011 6 commits
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Axel Lin authored
codec->hw_write is broken now, convert codec->hw_write to snd_soc_write. The hardware has 2 banks of registers sharing a section in I2C register space. The 1st bank is the primary one and is cached. The 2nd bank is for loading coefficients only and they do not need cache. These coefficients registers are therefore direct writes. Thus we set cache_bypass flag to deal with this before calling snd_soc_write. Signed-off-by:
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Julia Lawall authored
Add a new variable for storing resources accessed subsequent to the one accessed using request_mem_region, so the one accessed using request_mem_region can be released if needed. The resource variable names are also changed to be more descriptive. This code is also missing some calls to iounmap. The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r@ expression E, E1; identifier f; statement S1,S2,S3; @@ if (E == NULL) { ... when != if (E == NULL || ...) S1 else S2 when != E = E1 *E->f ... when any return ...; } else S3 // </smpl> Signed-off-by:
Julia Lawall <julia@diku.dk> Signed-off-by:
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Axel Lin authored
Ensure all mask bits are clear before setting new value. Signed-off-by:
Dong Aisheng <b29396@freescale.com> Acked-by:
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Axel Lin authored
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Ashish Chavan authored
DA7210 has three line outputs. OUT1 Left, OUT1 Right and OUT2 (mono). This patch adds support for gain controls for these three line outs. It also adds support for overall DAC gain control. Signed-off-by:
Ashish Chavan <ashish.chavan@kpitcummins.com> Signed-off-by:
David Dajun Chen <dchen@diasemi.com> Acked-by:
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Ashish Chavan authored
This patch adds support for DAPM covering all inputs and outputs as well as ADC and DAC. Signed-off-by:
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- 21 Oct, 2011 2 commits
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Axel Lin authored
We have defined SGTL5000_LINREG_VDDD_MASK in sgtl5000.h, use it instead of hardcoded (0x1 << 4) - 1 for the mask. Signed-off-by:
Wolfram Sang <w.sang@pengutronix.de> Acked-by:
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Axel Lin authored
Otherwise calling ldo_regulator_remove() does not unregister regulator and free memories. Signed-off-by:
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- 20 Oct, 2011 6 commits
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Axel Lin authored
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Axel Lin authored
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Axel Lin authored
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
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Axel Lin authored
According to the register map in datasheet, the registers are 8 bit. Signed-off-by:
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Axel Lin authored
According to the datasheet: BIT 2:1 VMID_SEL[1:0] VMID Divider Enable and Select 00 = VMID disabled 01 = 2x40k Omh divider 10 = 2x240k Omh divider 11 = 2x5k Omh divider To set VMID 2*240k, we should OR reg with 0x04 instead of 0x40. Signed-off-by:
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- 19 Oct, 2011 7 commits
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Axel Lin authored
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Ashish Chavan authored
This patch adds controls to set following ALC parameters, - Max gain, Min gain, Noise gain, Attack rate, Release rate and delay It also adds a switch to enable/disable noise suppression. As per DA7210 data sheet, ALC and noise suppression can be enabled only if certain conditions are met. This condition checks are handled by simply using "_EXT" version of controls to capture change events. Signed-off-by:
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Ashish Chavan authored
This patch adds support for below set of controls, (1) Mute controls for MIC, AUX and ADC (2) Zero cross controls for head phone, AUX, INPGA and line out (3) Head phone mode selection - class H or G It also adds digital_mute() call back. Signed-off-by:
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Axel Lin authored
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Axel Lin authored
Use snd_soc_update_bits for read-modify-write register access instead of open-coding it using snd_soc_read and snd_soc_write Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de> Acked-by:
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Mark Brown authored
Not that we have interrupt handling in the driver at the minute. Signed-off-by:
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Axel Lin authored
According to the datasheet: CHIP_MIC_CTRL 0x002A BITS[9:8] BIAS_RESISTOR 0x0 = Powerd off 0x1 = 2.0 kohm 0x2 = 4.0 kohm 0x3 = 8.0 kohm To set mic bias resistor, we need to update bits[9:8] of SGTL5000_CHIP_MIC_CTRL register. Signed-off-by:
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