- 24 Apr, 2017 40 commits
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Adrian Hunter authored
Tuning execution is already synchronized with respect to other host operations by upper layers "claiming" the host, which also takes care of runtime pm. There can be no requests in progress. Retain the spin lock usage only for ensuring that sending tuning commands is synchronized with respect to the interrupt handler. Signed-off-by:
Adrian Hunter <adrian.hunter@intel.com> Signed-off-by:
Ulf Hansson <ulf.hansson@linaro.org> Tested-by:
Ludovic Desroches <ludovic.desroches@microchip.com>
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Adrian Hunter authored
The spin lock is not necessary in set_ios. Anything that is racing with changes to the I/O state is already broken. The mmc core already provides synchronization via "claiming" the host. So remove spin_lock and friends from sdhci_set_ios and related callbacks. Signed-off-by:
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Adrian Hunter authored
Drivers can use the host operation directly, so remove this now unused callback. Signed-off-by:
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Adrian Hunter authored
Make use of an Intel ACPI _DSM that provides eMMC driver strength. Signed-off-by:
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Adrian Hunter authored
Make use of an Intel ACPI _DSM that indicates if re-tuning is needed after D3. Signed-off-by:
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Adrian Hunter authored
Let devices define their own private data to facilitate device-specific operations. The size of the private structure is specified in the sdhci_pci_fixes structure, then sdhci_pci_probe_slot() will allocate extra space for it, and sdhci_pci_priv() can be used to get a reference to it. Signed-off-by:
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Adrian Hunter authored
Devices might save and restore tuning values so that re-tuning might not be needed after a pm transition. Let drivers decide by pushing the mmc_retune_needed() logic down to them. Signed-off-by:
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Adrian Hunter authored
The delay loops for reset and clock enable always take at least 1 ms because they use mdelay(1). However they can take a lot less time e.g. less than 50us. Use ktime and reduce the delay to 10 microseconds per loop. Signed-off-by:
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Eric Anholt authored
The 2835 has two SD controllers: The Arasan sdhci controller (supported by the iproc driver) and a custom sdhost controller. This patch adds a driver for the latter. The sdhci controller supports both sdcard and sdio. The sdhost controller supports the sdcard only, but has better performance. Also note that the rpi3 has sdio wifi, so driving the sdcard with the sdhost controller allows to use the sdhci controller for wifi support. The configuration is done by devicetree via pin muxing. Both SD controller are available on the same pins (2 pin groups = pin 22 to 27 + pin 48 to 53). So it's possible to use both SD controllers at the same time with different pin groups. The code was originally written by Phil Elwell in the downstream Rasbperry Pi tree. In preparation for the upstream merge it was cleaned up and the code base was moderized by Eric Anholt, Stefan Wahren and Gerd Hoffmann. Signed-off-by:
Eric Anholt <eric@anholt.net> Signed-off-by:
Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Signed-off-by:
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Eric Anholt authored
This is the other SD controller on the platform, which can be swapped to the role of SD card host using pin muxing. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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tcharding authored
File contains multiple functions doing variations on the same thing, sdio_readb(), sdio_writeb()f, sdio_readw(), sdio_writew() etc. Although the functions have very similar logic the code is laid out in a variety of ways. This makes it overly complicated to read. There is a already a nice clean chunk of code, if we use this format for all instances then we will have cleaned up the code, reduced the line count and lessened the cognitive load required while reading. Less lines equals less bugs. Pick the most simple and clear code flow and change all functions to be the same. Signed-off-by:
Tobin C. Harding <me@tobin.cc> Signed-off-by:
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tcharding authored
Various functions take as parameter an optional pointer. Pointer should be guarded with non-NULL check before dereferencing. Add non-NULL check before dereference of pointer. Signed-off-by:
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Michał Zegan authored
This patch fixes the case where meson_mmc_probe function fails before core_clk is enabled. Originally, that would result in a try to disable the core clock, and if it was not already enabled, it would result in a kernel warning. This issue is similar to the one with div_clk. Fix it by introducing another error path used only between successfully enabling the core clock, and successfully enabling the div clock. That would ensure that core clock is disabled only if it was enabled before. Signed-off-by:
Michał Zegan <webczat@webczatnet.pl> Signed-off-by:
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Thierry Reding authored
The SDHCI controller found on Tegra186 in very similar to the controller found on earlier generations of Tegra. Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Thierry Reding authored
The list of compatible strings is somewhat difficult to read and extend. Reformat it into a list to make it more easily extensible. While at it, also remove the "plus one of the above" clause because it isn't actually valid. Signed-off-by:
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Jisheng Zhang authored
sdhci_pltfm_init() has already set the platform drvdata for us, remove the unnecessary platform_set_drvdata() call. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Acked-by:
Patrice Chotard <patrice.chotard@st.com> Signed-off-by:
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Jisheng Zhang authored
sdhci_pltfm_init() has already set the platform drvdata for us, remove the unnecessary platform_set_drvdata() call. Signed-off-by:
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Jisheng Zhang authored
sdhci_pltfm_init() has already set the platform drvdata for us, remove the unnecessary platform_set_drvdata() call. Signed-off-by:
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Piotr Sroka authored
Add support for HS400ES mode to Cadence SDHCI driver. Signed-off-by:
Piotr Sroka <piotrs@cadence.com> Reviewed-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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Thierry Reding authored
The SDHCI controller found on NVIDIA Tegra186 SoCs is very similar to the one on prior generations of Tegra and can be supported by the same driver. Acked-by:
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Thierry Reding authored
The device tree binding for the SDHCI controller found on Tegra SoCs specifies that a reset control can be provided by the device tree. No code was ever added to support the module reset, which can cause the driver to try and access registers from a module that's in reset. On most Tegra SoC generations doing so would cause a hang. Note that it's unlikely to see this happen because on most platforms these resets will have been deasserted by the bootloader. However the portability can be improved by making sure the driver deasserts the reset before accessing any registers. Since resets are synchronous on Tegra SoCs, the platform driver needs to implement a custom ->remove() callback now to make sure the clock is disabled after the reset is asserted. Acked-by:
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Michał Zegan authored
The mmc host was added in meson_mmc_probe, but never removed in meson_mmc_remove. Fix that by removing the host before deallocating other resources. Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Signed-off-by:
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Wolfram Sang authored
After we received the dataend interrupt, R1 response register carries the value from the automatically generated stop command. Report that info back to the MMC block layer, so we will be notified in case of e.g. ECC errors which happened during the last transfer. Reviewed-by:
Simon Horman <horms+renesas@verge.net.au> Tested-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by:
Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by:
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Wolfram Sang authored
Halting the kernel on an unsupported stop command seems overkill, report the error and say what we already did (due to autocmd12) instead. Reviewed-by:
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Wolfram Sang authored
Making sure we match the actual register names. Reviewed-by:
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Wolfram Sang authored
Reviewed-by:
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Wolfram Sang authored
The current code assumes that DMA is finished before SD access end is flagged. Thus, it schedules the 'dma_complete' tasklet in the SD card interrupt routine when DATAEND is set. The assumption is not safe, though. Even by mounting an SD card, it can be seen that sometimes DMA complete is first, sometimes DATAEND. It seems they are usually close enough timewise to not cause problems. However, a customer reported that with CMD53 sometimes things really break apart. As a result, the BSP has a patch which introduces flags for both events and makes sure both flags are set before scheduling the tasklet. The customer accepted the patch, yet it doesn't seem a proper upstream solution to me. This patch refactors the code to replace the tasklet with already existing and more lightweight mechanisms. First of all, we set the callback in a DMA descriptor to automatically get notified when DMA is done. In the callback, we then use a completion to make sure the SD access has already ended. Then, we proceed as before. Signed-off-by:
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Alexey Khoroshilov authored
There is no check if clk_prepare_enable() succeed in sdhci_pxav2_probe(). Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by:
Alexey Khoroshilov <khoroshilov@ispras.ru> Acked-by:
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Heiner Kallweit authored
Replace timeout magic numbers with proper constants. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Acked-by:
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Heiner Kallweit authored
Struct mmc_command includes a reference to the related mmc_request. Therefore we don't have to store mrq separately in struct meson_host. And we can remove some now unneeded WARN_ON's. Signed-off-by:
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Heiner Kallweit authored
Config values which are not changed during runtime we can set in the probe function already. The block size setting is overwritten later in meson_mmc_start_cmd anyway if needed, so it doesn't harm if we remove this setting in meson_mmc_set_ios. In addition write config register only if configuration changed. Don't change the location of clock initialization as in an earlier version of the patch, this change causes a hang. This issue was reported and fix suggested by: Helmut Klein <hgkr.klein@gmail.com> Signed-off-by:
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Heiner Kallweit authored
CLK core does a deep copy of init.name, therefore it's fully ok to provide a local variable. Signed-off-by:
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Heiner Kallweit authored
The condition should be "if (ret)" as the disable/unprepare is supposed to be executed if the previous command fails. In addition adjust the error path in probe to properly deal with the case that cfg_div_clk can be registered successfully but enable/prepare fails. In this case we shouldn't call clk_disable_unprepare. Reported-by:
Michał Zegan <webczat_200@poczta.onet.pl> Signed-off-by:
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Heiner Kallweit authored
Member mux_parent isn't used outside meson_mmc_clk_init. So remove it and replace it with a local variable in meson_mmc_clk_init. Signed-off-by:
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Heiner Kallweit authored
Because the DT requires a fixed number of mux parent clocks, variable mux_parent_count can be replaced with constant MUX_CLK_NUM_PARENTS, so remove it. Signed-off-by:
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Heiner Kallweit authored
Member ocr_mask is never used and member irq we can replace with a local variable in meson_mmc_probe. So let's remove both members. Signed-off-by:
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Heiner Kallweit authored
The return value of meson_mmc_request_done and meson_mmc_read_resp isn't used, so make both functions return void. Signed-off-by:
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Heiner Kallweit authored
Core ensures that there are no commands with cmd->data being set and nothing to transfer. And we don't have to reset bit CMD_CFG_DATA_NUM because cmd_cfg was zero-initialized and this bit isn't set. Signed-off-by:
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Shawn Lin authored
Too much condition iteration makes the code less readable. Slightly improve it. Signed-off-by:
Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by:
Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by:
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Shawn Lin authored
No functional change intended. Signed-off-by:
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