- 12 Oct, 2007 40 commits
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Venki Pallipadi authored
A bugfix in ich5 hpet force detect which caused resumes to fail. Thanks to Udo A Steinberg for reporting the problem. Signed-off-by:
Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Cc: Andi Kleen <ak@suse.de> Cc: john stultz <johnstul@us.ibm.com> Cc: Greg KH <greg@kroah.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Ingo Molnar <mingo@elte.hu> Signed-off-by:
Arjan van de Ven <arjan@linux.intel.com> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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Venki Pallipadi authored
force_enable hpet for ICH5. [ Build fixes from Andrew Morton ] Signed-off-by:
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Venki Pallipadi authored
Enable HPET later during boot, after the force detect in PCI quirks. Also add a call to repeat the force enabling at resume time. Signed-off-by:
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Venki Pallipadi authored
Force detect and/or enable HPET on ICH chipsets. This patch just handles the detection part and following patches use this information. Adds a function to repeat the force enabling during resume time. Using HPET this way, instead of PIT increases the time CPUs can reside in C-state when system is totally idle. On my test system with Core 2 Duo, average C-state residency goes up from ~20mS to ~80mS. [ Build fixed from Andrew Morton ] Signed-off-by:
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Venki Pallipadi authored
Restructure and rename legacy replacement mode HPET timer support. Just the code structural changes and should be zero functionality change. Signed-off-by:
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Venki Pallipadi authored
Change the broadcast timer, if a timer with higher rating becomes available. Signed-off-by:
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Chris Wright authored
Remove hpet_readl/writel from vsyscall.h, where it does not belong anyway. Use the hpet code itself. Signed-off-by:
Chris Wright <chrisw@sous-sol.org> Signed-off-by:
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Thomas Gleixner authored
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Thomas Gleixner authored
The conversion of x86-64 to clock events makes the #ifdef CONFIG_GENERIC_CLOCKEVENTS n the timer broadcast functions useless. Remove it. Signed-off-by:
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Chris Wright authored
The x86 hpet cleanups allow removal of some unused macros. Signed-off-by:
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Chris Wright authored
Make variables static. Signed-off-by:
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Thomas Gleixner authored
Remove the unused code after the switch to clock events. Signed-off-by:
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Thomas Gleixner authored
Combine the timex.h variants and move the TSC related code into tsc.h. Move the set_cyc2ns_scale() call into the tsc calibraction code, where it belongs. Signed-off-by:
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Thomas Gleixner authored
Useless header file with 32 bit and 64 bit variants. Move the single useful line to the place where it is used. Signed-off-by:
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Thomas Gleixner authored
AMDs C1E enabled CPUs stop the local apic timer, when both cores are idle. This is a hardware feature which breaks highres/dynticks. Add the same quirk as we have for 32 bit already. Signed-off-by:
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Thomas Gleixner authored
The clock events merge introduced a change to the nmi watchdog code to handle the not longer increasing local apic timer count in the broadcast mode. This is fine for UP, but on SMP it pampers over a stuck CPU which is not handling the broadcast interrupt due to the unconditional sum up of local apic timer count and irq0 count. To cover all cases we need to keep track on which CPU irq0 is handled. In theory this is CPU#0 due to the explicit disabling of irq balancing for irq0, but there are systems which ignore this on the hardware level. The per cpu irq0 accounting allows us to remove the irq0 to CPU0 binding as well. Add a per cpu counter for irq0 and evaluate this instead of the global irq0 count in the nmi watchdog code. Signed-off-by:
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Thomas Gleixner authored
Finally switch to the clockevents code. Share code with i386 for hpet and PIT. Signed-off-by:
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Thomas Gleixner authored
Signed-off-by:
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Chris Wright authored
Add tick_nohz_{stop,restart}_sched_tick to idle loop in prepartion for turning on dynticks. These are just noops until NO_HZ is enabled. Signed-off-by: -
Thomas Gleixner authored
setup_APIC_timer disables interrupts anyway. So no need to do the same in setup_boot_APIC_clock and setup_secondary_APIC_clock. Disable interrupts explicit in the calibration code. Signed-off-by:
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Thomas Gleixner authored
setup_APIC_timer takes the file global calibration result as an argument. Remove it. Signed-off-by:
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Thomas Gleixner authored
APIC_DIVISOR is rather useless. It makes the calibration result more accurate in the first place, but we discard this later when we write the value to the APIC timer by dividing the calibration value by APIC_DIVISOR. Signed-off-by:
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Thomas Gleixner authored
Let the calibration code fill in calibration_result directly and move the variable on top of the file. Fixup a printk w/o log level while at it. Signed-off-by:
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Thomas Gleixner authored
The APIC timer setup code synchronizes the local APIC timer to the PIT/HPET. This is pointless as the PIT and the local APIC timer frequency are not correlated and the APIC timer calibration can never be accurate enough to avoid that the local APIC timer and the PIT/HPET drift apart. Simply remove it. Signed-off-by:
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Thomas Gleixner authored
Change __setup_APIC_LVTT so it takes the arguments which are necessary for the later clock events switch. Signed-off-by:
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Yinghai Lu authored
[ tglx: arch/x86 adaptation ] Signed-off-by:
Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by:
Andi Kleen <ak@suse.de> Cc: Christoph Lameter <clameter@sgi.com> Cc: Len Brown <lenb@kernel.org> Signed-off-by:
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Thomas Gleixner authored
PIT clock events work already and the PIT handling is the same for i386 and x86_64. x86_64 does not support PIT as a clock source, so disable the PIT clocksource for x86_64. Use the i386 i8253.h include file for x86_64 as well to share the exports and the PIT constants. Signed-off-by:
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Thomas Gleixner authored
PIT clock events work already and the PIT handling is the same for i386 and x86_64. x86_64 does not support PIT as a clock source, so disable the PIT clocksource for x86_64. Prepare i8253.h to be shared with x8664 Signed-off-by:
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Thomas Gleixner authored
Add the x8664 specific bits (mapping) to share the hpet code later. Move the reserve_platform_timer call to late init. This is necessary for x86_64, as hpet enable() is called before memory is setup. i386 calls it in late_time_init, but it does not hurt to do it later for both. Pull in the x8664 hpet disable command line option as well. Signed-off-by:
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Thomas Gleixner authored
The hpet implementations of i386 and x8664 has been mostly the same before the clock events conversion of i386. The clock events conversion of i386 hpet is already done. So it makes sense to share the code for the x86_64 clock events conversion. Abstract out the mapping functions. Signed-off-by:
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Thomas Gleixner authored
Move the TSC calibration code to tsc.c. Reimplement it so the pm timer can be used as a reference as well. Signed-off-by:
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Thomas Gleixner authored
TSC must be verified by a continous and reliable clocksource to allow high resolution timers and or dynamic ticks. Signed-off-by:
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Andres Salomon authored
Add support for an MFGPT clock event device; this allows us to use MFGPTs as the basis for high-resolution timers. Signed-off-by:
Jordan Crouse <jordan.crouse@amd.com> Signed-off-by:
Andres Salomon <dilinger@debian.org> Cc: Andi Kleen <ak@suse.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by:
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Andres Salomon authored
This adds support for Multi-Function General Purpose Timers. It detects the available timers during southbridge init, and provides an API for allocating and setting the timers. They're higher resolution than the standard PIT, so the MFGPTs come in handy for quite a few things. Note that we never clobber the timers that the BIOS might have opted to use; we just check for unused timers. Signed-off-by:
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Venki Pallipadi authored
Disable irq balancing on IRQ0. Several SIS chipsets lock up when you try to change affinity of IRQ #0. Signed-off-by:
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Thomas Gleixner authored
The clock events merge introduced a change to the nmi watchdog code to handle the not longer increasing local apic timer count in the broadcast mode. This is fine for UP, but on SMP it pampers over a stuck CPU which is not handling the broadcast interrupt due to the unconditional sum up of local apic timer count and irq0 count. To cover all cases we need to keep track on which CPU irq0 is handled. In theory this is CPU#0 due to the explicit disabling of irq balancing for irq0, but there are systems which ignore this on the hardware level. The per cpu irq0 accounting allows us to remove the irq0 to CPU0 binding as well. Add a per cpu counter for irq0 and evaluate this instead of the global irq0 count in the nmi watchdog code. Signed-off-by:
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Thomas Gleixner authored
The next_event member of the clock event device is used to keep track of the next periodic event. For one shot only devices it is wrong to clear the variable, as the next event will be based on it. Pointed out by Ralf Baechle Signed-off-by:
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Thomas Gleixner authored
Migration aid to allow preparatory patches which introduce not yet used parts of clock events code. Signed-off-by:
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Thomas Gleixner authored
Signed-off-by:
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Al Viro authored
Signed-off-by:
Al Viro <viro@zeniv.linux.org.uk> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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