- 26 Aug, 2009 40 commits
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Sudhakar Rajashekhara authored
This patch adds platform data for the 512MB NAND Flash found on DA850/OMAP-L138 EVM. Currently it supports only 1-bit ECC. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
There are two instances of MMC/SD on da850/omap-l138. Connector for the first instance is available on the EVM. This patch adds support for this instance. This patch also adds support for card detect and write protect switches on da850/omap-l138 EVM. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
This patch adds platform support for the graphic display (Sharp LK043T1DG01) found on DA850/OMAP-L138 based EVM. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
Adds a macro to convert the GPIO signal passed as bank number and signal to GPIO pin number. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Chaithrika U S authored
Define resources for McASP used on DA850/OMAP-L138 EVM, add platform device defintion and Pin Mux configurations. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Chaithrika U S authored
Define resources for McASP1 used on DA830/OMAP-L137 EVM, add platform device defintion, initialization function. Additionally, this patch also adds version and FIFO related members to platform data structure. Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
DA850/OMAP-L138 has 144 pins configurable as GPIO, but currently this has been configured as 128. This patch corrects it. Also, this patch adds the base address for GPIO pins greater than 128. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
Earlier patch which adds EMAC support for da850/omap-l138 was not configuring the MDIO pins. Ethernet was working fine with the earlier patch, because the MDIO pins were configured from the boot loader. This patch removes that dependency. Also, this patch populates a member in the emac clk structure to say that EMAC LPSC sits on controller 1. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
DM365 RBL has been updated. The variant number has changed for this new revision of silicon. This patch adds support for the new revision of DM365. The name fields are also being updated to reflect the version of the silicon. Without this minor fix DM365 REV 1.2 will not boot up Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
The mask can hold only 8 bit values. This gave a compilation warning. This patch rectifies the warning. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
EDMA queues in DM365 are a little different than those on other DaVinci's. On DM365 Q0 and Q1 have the larger FIFO size. We want Q0 and Q1 to be used by codecs and DVSDK demos. MMC driver is the only driver which uses the flag 'EVENTQ_DEFAULT'. So MMC driver should be using Q2 instead of Q1 on DM365. This patch allows us to declare a "default queue" from SOC specific code. If it is not declared then the EDMA driver assumes a default of queue 1. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
DM365 and DM6467 have 4 queues. The patch updates the 'dma_event_q' enum to reflect this. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Kevin Hilman authored
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Kevin Hilman authored
There is no need to pass clock name strings in platform_data. Instead, setup clkdev nodes to have correct ASoC device names. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Hemant Pedanekar authored
Controls ATA_RSTn and ATA_PWD through CPLD register 0 to enable ATA. An I2C driver is added for the same. Calls ide init if enabled in configuration. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Kevin Hilman authored
Updated default defconfig after da850 merge and 2.6.31-rc3 update. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
Ethernet Media Access Controller (EMAC) on da850/omap-l138 supports 10/100 Mbps operation. It also supports Media Independent Interface (MII) and Reduced Media Independent Interface (RMII) to physical layer (PHY). Phy which supports MII is present on the DA850/OMAP-L138 base board and Phy supporting RMII is present on the UI card. This patch adds support only for the MII Phy. Support for RMII Phy will be added later. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
Add support for the DA850/OMAP-L138 Evaluation Module (EVM) from TI. The EVM has User Interface (UI) card which contains various devices. This UI card can be connected to the base board. Support for all the devices on the UI card and ones on the EVM will be added in subsequent patches. The EVM schematics are not available publicly yet; but should be available soon. A new defconfig for this board has been added mainly because the DA830/OMAP-L137 defconfig forces writethrough cache mode which is not required on DA850/OMAP-L138. This patch has been boot tested on DA850/OMAP-L138 EVM using ramdisk as filesystem. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
The DA850/OMAP-L138 is a new SoC from TI in the same family as DA830/OMAP-L137. Major changes include better support for power management, support for SATA devices and McBSP (same IP as DM644x). DA850/OMAP-L138 documents are available at http://focus.ti.com/docs/prod/folders/print/omap-l138.html. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sergei Shtylyov authored
DM646x has MUSB connected to IRQs 13 and 14 (unlike IRQ12 on other platforms), so pass the correct IRQ resources with the platform device. Signed-off-by: Dmitry Krivoschekov <dkrivoschekov@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
Rearrange the PINMUX macros and pinmux_setup function which are common between da830/omap-l137 and da850/omap-l138. Also, replace the da830 string in function names to da8xx. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sudhakar Rajashekhara authored
In EDMA resource structure, instead of passing EDMA CC interrupt, EDMA TC error interrupt number is being passed. Before the patch: root@arago:~# cat /proc/interrupts CPU0 12: 0 cp_intc edma_error 13: 0 cp_intc edma Err: After the patch: root@arago:~# cat /proc/interrupts CPU0 11: 0 cp_intc edma 12: 0 cp_intc edma_error Err: Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Rajashekhara, Sudhakar authored
With the introduction of TI da850/omap-l138, some of the macros defined for da830/omap-l137 will be needed in da850 source file. So, move the common macros to da8xx.h header file. Also, modify the macro names from DA830_... to DA8XX_. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Hemant Pedanekar authored
This patch adds platform data and init function for IDE which could be called from board specific file to register IDE device. Note that for 594MHz device the transfer mode is limited to UDMA4 since ideclk rate is less than 100 MHz, which forces udma_mask in palm_bk3710.c to UDMA4, while for 729MHz device, it is UDMA5. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sekhar Nori authored
Make arch_idle and arch_reset inline as inline function. Not having them inline leads to a warning of this sort when only one of these functions is used: arch/arm/mach-davinci/include/mach/system.h:24: warning: 'arch_reset' \ defined but not used boot, re-boot tested on OMAP-L138 EVM Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Kevin Hilman authored
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Hemant Pedanekar authored
This patch takes out IO mapping macros from mach/io.h and puts them in mach/hardware.h avoiding need to include mach/io.h in various files such as serial.h, vmalloc.h etc. The main reason to avoid inclusion of mach/io.h is, when default in/out macros are overridden by machine specific functions (e.g., in case of PCI I/O), they result into linker error. An example snippet and error snapshot is listed below. Following code in mach/io.h: #define inl(p) my_inl() static inline unsigned int my_inl(unsigned int addr) { if (IS_PCI_IO(addr)) return pci_inl (); else return le32_to_cpu(__raw_readl(__typesafe_io(addr))); } leads to error: LD arch/arm/boot/compressed/vmlinux arch/arm/boot/compressed/misc.o: In function `my_inl': misc.c:(.text+0x2744): undefined reference to `pci_inl' make[2]: *** [arch/arm/boot/compressed/vmlinux] Error 1 This is because mach/io.h gets included in arch/arm/boot/compressed/misc.c through mach/serial.h but pci.c file, which defines 'pci_inl' doesn't get built into compressed vmlinux. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Hemant Pedanekar authored
This patch adds clock data for IDE and also updates pin mux mask for ATA so as to disable PCI when ATA is selected. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Kevin Hilman authored
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Chaithrika U S authored
1) Registers the platform devices for ASP on dm355, dm644x and dm646x so that the machine driver can probe to get ASP related platform data. 2) Move towards definition of the asp clocks using physical name(for dm355 and dm644x) 3) Add platform data to board specific files. Signed-off-by: Naresh Medisetty <naresh@ti.com> Signed-off-by: Chaithrika U S <chaithrika@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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David Brownell authored
Support DM365 GPIOs ... primarily by handling non-banked GPIO IRQs: - Flag DM365 chips as using non-banked GPIO interrupts, using a new soc_info field. - Replace the gpio_to_irq() mapping logic. This now uses some runtime infrastructure, keyed off that new soc_info field, which doesn't handle irq_to_gpio(). - Provide a new irq_chip ... GPIO IRQs handled directly by AINTC still need edge triggering managed by the GPIO controller. DM365 chips no longer falsely report 104 GPIO IRQs as they boot. Intelligence about IRQ muxing is missing, so for the moment this only exposes the first eight DM365 GPIOs, which are never muxed. The next eight are muxed, half with Ethernet (which uses most of those pins anyway). Tested on DM355 (10 unbanked IRQs _or_ 104 banked ones) and also on DM365 (16 unbanked ones, only 8 made available). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
Patch updates DM365 PINMUX by adding entries for Video, SPI 1 - 4, PWM 0 - 3. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
Add support for the DA830/OMAP-L137 Evaluation Module (EVM) from TI. The EVM has User Interface (UI) and Audio cards that can be connected which contain various devices. Support for those devices and ones on the EVM will be added in subsequent patches. Additional generalizations for future SoCs in da8xx family done by Sudhakar Rajashekhara and Sekhar Nori. Signed-off-by: Steve Chen <schen@mvista.com> Signed-off-by: Mark A. Greer <mgreer@mvista.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Mark A. Greer authored
The da830/omap l137 is a new SoC from TI that is similar to the davinci line. Since its so similar to davinci, put the support for the da830 in the same directory as the davinci code. There are differences, however. Some of those differences prevent support for davinci and da830 platforms to work in the same kernel binary. Those differences are: 1) Different physical address for RAM. This is relevant to Makefile.boot addresses and PHYS_OFFSET. The Makefile.boot issue isn't truly a kernel issue but it means u-boot won't work with a uImage including both architectures. The PHYS_OFFSET issue is addressed by the "Allow for runtime-determined PHYS_OFFSET" patch by Lennert Buytenhek but it hasn't been accepted yet. 2) Different uart addresses. This is only an issue for the 'addruart' assembly macro when CONFIG_DEBUG_LL is enabled. Since the code in that macro is called so early (e.g., by _error_p in kernel/head.S when the processor lookup fails), we can't determine what platform the kernel is running on at runtime to use the correct uart address. These areas have compile errors intentionally inserted to indicate to the builder they're doing something wrong. A new config variable, CONFIG_ARCH_DAVINCI_DMx, is added to distinguish between a true davinci architecture and the da830 architecture. Note that the da830 currently has an issue with writeback data cache so CONFIG_CPU_DCACHE_WRITETHROUGH should be enabled when building a da830 kernel. Additional generalizations for future SoCs in the da8xx family done by Sudhakar Rajashekhara and Sekhar Nori. Signed-off-by: Steve Chen <schen@mvista.com> Signed-off-by: Mikhail Cherkashin <mcherkashin@ru.mvista.com> Signed-off-by: Mark A. Greer <mgreer@mvista.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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David Brownell authored
Add basic support for the CPLD on the DM365 EVM board: - Read SW5 to set up NAND and keypad vs (someday) OneNAND - Export MMC/SD card detect and writeprotect signals - LED support (same layout as on DM355 EVM) - Static config for video input: * external HD imager precludes MMC1, Ethernet, audio * else either tvp5146 (SD/default) or tvp7002 (HD) The video input could actually be switched around dynamically; change that if/when that's needed (and after those other video inputs have driver support). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
Patch adds support for MMC/SD in the DM365 EVM. Pinmux for MMC/SD slot 1 on the DM365 EVM is also configured. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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Sandeep Paulraj authored
The patch adds Support for EMAC in the DM365 SOC and the DM365 EVM board. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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