- 24 Apr, 2019 4 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
- Add the amdgpu specific bits for timeline support - Add internal interfaces for xgmi pstate support - DC Z ordering fixes for planes - Add support for NV12 planes in DC - Add colorspace properties for planes in DC - eDP optimizations if the GOP driver already initialized eDP - DC bandwidth validation tracing support Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexdeucher@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190419150034.3473-1-alexander.deucher@amd.com
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git://anongit.freedesktop.org/tegra/linuxDave Airlie authored
drm/tegra: Changes for v5.2-rc1 This contains a fix for the usage of shared resets that previously generated a WARN on boot. In addition, there's a fix for CPU cache maintenance of GEM buffers allocated using get_pages(). (airlied: contains a merge from a shared tegra tree) Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for v5.2: UAPI Changes: - Document which feature flags belong to which command in virtio_gpu.h - Make the FB_DAMAGE_CLIPS available for atomic userspace only, it's useless for legacy. Cross-subsystem Changes: - Add device tree bindings for lg,acx467akm-7 panel and ST-Ericsson Multi Channel Display Engine MCDE - Add parameters to the device tree bindings for tfp410 - iommu/io-pgtable: Add ARM Mali midgard MMU page table format - dma-buf: Only do a 64-bits seqno compare when driver explicitly asks for it, else wraparound. - Use the 64-bits compare for dma-fence-chains Core Changes: - Make the fb conversion functions use __iomem dst. - Rename drm_client_add to drm_client_register - Move intel_fb_initial_config to core. - Add a drm_gem_objects_lookup helper - Add drm_gem_fence_array helpers, and use it in lima. - Add drm_format_helper.c to kerneldoc. Driver Changes: - Add panfrost driver for mali midgard/bitfrost. - Converts bochs to use the simple display type. - Small fixes to sun4i, tinydrm, ti-fp410. - Fid aspeed's Kconfig options. - Make some symbols/functions static in lima, sun4i and meson. - Add a driver for the lg,acx467akm-7 panel. Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
UAPI Changes: - uAPI "Fixes:" patch for the upcoming kernel 5.1, included here too We have an Ack from the media folks (only current user) for this late tweak Cross-subsystem Changes: - ALSA: hda: Fix racy display power access (Takashi, Chris) Driver Changes: - DDI and MIPI-DSI clocks fixes for Icelake (Vandita) - Fix Icelake frequency change/locking (RPS) (Mika) - Temporarily disable ppGTT read-only bit on Icelake (Mika) - Add missing Icelake W/As (Mika) - Enable 12 deep CSB status FIFO on Icelake (Mika) - Inherit more Icelake code for Elkhartlake (Bob, Jani) - Handle catastrophic error on engine reset (Mika) - Shortcut readiness to reset check (Mika) - Regression fix for GEM_BUSY causing us to report a mixed uabi-class request as not busy (Chris) - Revert back to max link rate and lane count on eDP (Jani) - Fix pipe BPP readout for BXT/GLK DSI (Ville) - Set DP min_bpp to 8*3 for non-RGB output formats (Ville) - Enable coarse preemption boundaries for Gen8 (Chris) - Do not enable FEC without DSC (Ville) - Restore correct BXT DDI latency optim setting calculation (Ville) - Always reset context's RING registers to avoid running workload twice during reset (Chris) - Set GPU wedged on driver unload (Janusz) - Consolidate two similar barries from timeline into one (Chris) - Only reset the pinned kernel contexts on resume (Chris) - Wakeref tracking improvements (Chris, Imre) - Lockdep fixes for shrinker interactions (Chris) - Bump ready tasks ahead of busywaits in prep of semaphore use (Chris) - Huge step in splitting display code into fine grained files (Jani) - Refactor the IRQ init/reset macros for code saving (Paulo) - Convert IRQ initialization code to uncore MMIO access (Paulo) - Convert workarounds code to use uncore MMIO access (Chris) - Nuke drm_crtc_state and use intel_atomic_state instead (Manasi) - Update SKL clock-gating WA (Radhakrishna, Ville) - Isolate GuC reset code flow (Chris) - Expose force_dsc_enable through debugfs (Manasi) - Header standalone compile testing framework (Jani) - Code cleanups to reduce driver footprint (Chris) - PSR code fixes and cleanups (Jose) - Sparse and kerneldoc updates (Chris) - Suppress spurious combo PHY B warning (Vile) Signed-off-by:
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- 23 Apr, 2019 1 commit
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https://gitlab.freedesktop.org/drawat/linuxDave Airlie authored
Resource dirtying improvement by Thomas, user-space error logging improvement and some other minor fixes. Signed-off-by:
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- 18 Apr, 2019 1 commit
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Dmitry Osipenko authored
The allocated pages need to be invalidated in CPU caches. On ARM32 the DMA_BIDIRECTIONAL flag only ensures that data is written-back to DRAM and the data stays in CPU cache lines. While the DMA_FROM_DEVICE flag ensures that the corresponding CPU cache lines are getting invalidated and nothing more, that's exactly what is needed for a newly allocated pages. This fixes randomly failing rendercheck tests on Tegra30 using the Opentegra driver for tests that use small-sized pixmaps (10x10 and less, i.e. 1-2 memory pages) because apparently CPU reads out stale data from caches and/or that data is getting evicted to DRAM at the time of HW job execution. Fixes: bd43c9f0 ("drm/tegra: gem: Map pages via the DMA API") Cc: stable <stable@vger.kernel.org> Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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- 17 Apr, 2019 13 commits
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Jonathan Marek authored
Add ACX467AKM-7 4.95" 1080×1920 LCD panel that is found on the LG Nexus 5 (hammerhead) phone. Signed-off-by:
Jonathan Marek <jonathan@marek.ca> [masneyb@onstation.org: checkpatch fixes; rename jdi,1080p-hammerhead binding to lg,acx467akm-7.] Signed-off-by:
Brian Masney <masneyb@onstation.org> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Brian Masney authored
Add binding for the LG ACX467AKM-7 4.95" 1080×1920 LCD panel that is found on the LG Nexus 5 (hammerhead) phone. This appears to be a JDI panel based on some Internet searches, however a specific model number could not be found. I disassembled an old Nexus 5 with a broken screen and the LG part number is the only model number present on the back of the panel, so I think that is probably the best ID to use. Signed-off-by:
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Linus Walleij authored
This adds the device tree bindings for the ST-Ericsson Multi Channel Display Engine MCDE as found in the U8500 SoCs. Cc: devicetree@vger.kernel.org Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Dave Airlie authored
This reverts commit 8059add0. This commit while seemingly a good idea, breaks a radv check, for a node being master because something succeeds where it failed before now. Apply the Linus rule, revert early and try again, we don't break userspace. Signed-off-by:
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Janusz Krzysztofik authored
Commit f06ddb53 ("BackMerge v5.1-rc5 into drm-next") incorrectly resolved a merge conflict related to a patch having been merged twice: - commit 3f04e0a6 ("drm: Fix drm_release() and device unplug") introduced as a standalone fix via drm-fixes branch, - commit 1ee57d4d ("drm: Fix drm_release() and device unplug") applied as patch 1/2 of a series on drm-next branch. That incorrect resolution of the conflict effectively reverted a change introduced to drivers/gpu/drm/drm_drv.c by patch 2/2 of that series - commit ba3bf37e ("drm/drv: drm_dev_unplug(): Move out drm_dev_put() call"). Fix it. Fixes: f06ddb53 ("BackMerge v5.1-rc5 into drm-next") Signed-off-by:
Janusz Krzysztofik <janusz.krzysztofik@linux.intel.com> Signed-off-by:
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Neil Armstrong authored
The Amlogic SoCs Canvas buffers stride must be aligned on 64bytes and overall size should be aligned on PAGE width. Adds a custom dumb_create op to adds these requirements. Fixes: bbbe775e ("drm: Add support for Amlogic Meson Graphic Controller") Suggested-by:
Sky Zhou <sky.zhou@amlogic.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
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YueHaibing authored
Fix sparse warnings: drivers/gpu/drm/meson/meson_viu.c:93:6: warning: symbol 'meson_viu_set_g12a_osd1_matrix' was not declared. Should it be static? drivers/gpu/drm/meson/meson_viu.c:121:6: warning: symbol 'meson_viu_set_osd_matrix' was not declared. Should it be static? drivers/gpu/drm/meson/meson_viu.c:190:6: warning: symbol 'meson_viu_set_osd_lut' was not declared. Should it be static? Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Acked-by:
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YueHaibing authored
Fix sparse warnings: drivers/gpu/drm/sun4i/sun8i_tcon_top.c:271:36: warning: symbol 'sun8i_r40_tcon_top_quirks' was not declared. Should it be static? drivers/gpu/drm/sun4i/sun8i_tcon_top.c:276:36: warning: symbol 'sun50i_h6_tcon_top_quirks' was not declared. Should it be static? drivers/gpu/drm/sun4i/sun4i_tcon.c:239:6: warning: symbol 'sun4i_tcon_set_mux' was not declared. Should it be static? Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416145855.20852-1-yuehaibing@huawei.com
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YueHaibing authored
Fix sparse warning: drivers/gpu/drm/lima/lima_sched.c:356:36: warning: symbol 'lima_sched_ops' was not declared. Should it be static? Fixes: a1d2a633 ("drm/lima: driver for ARM Mali4xx GPUs") Reported-by:
Qiang Yu <yuq825@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416144353.34024-1-yuehaibing@huawei.com
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Joonas Lahtinen authored
Signed-off-by:Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Jani Nikula authored
The cdclk init/uninit code was changed by commit 93a643f2 ("drm/i915/cdclk: have only one init/uninit function") between the versions of commit 39564ae8 ("drm/i915/ehl: Inherit Ice Lake conditional code"). What got merged fails to do cdclk init/uninit on ehl. Fixes: 39564ae8 ("drm/i915/ehl: Inherit Ice Lake conditional code") Cc: José Roberto de Souza <jose.souza@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Bob Paauwe <bob.j.paauwe@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by:
Bob Paauwe <bob.j.paauwe@intel.com> Reviewed-by:
José Roberto de Souza <jose.souza@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190416082852.18141-1-jani.nikula@intel.com
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Gerd Hoffmann authored
Also drop the dstclip parameter sphinx has warned about (leftover from an earlier patch version). Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20190416090533.28374-1-kraxel@redhat.com
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Chris Wilson authored
SSEU reprogramming of the context introduced the notion of engine class and instance for a forwards compatible method of describing any engine beyond the old execbuf interface. We wish to adopt this class:instance description for more interfaces, so pull it out into a separate type for userspace convenience. Fixes: e46c2e99 ("drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)") Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com> Cc: Tony Ye <tony.ye@intel.com> Cc: Andi Shyti <andi@etezian.org> Reviewed-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Acked-by:
Tony Ye <tony.ye@intel.com> Reviewed-by:
Andi Shyti <andi@etezian.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190412071416.30097-1-chris@chris-wilson.co.uk
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- 16 Apr, 2019 16 commits
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Eric Anholt authored
It's a pretty direct port of what I did for v3d. Signed-off-by:
Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190401222635.25013-8-eric@anholt.netReviewed-and-tested-by:
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Eric Anholt authored
I needed to add implicit dependency support for v3d, and Rob Herring has been working on it for panfrost, and I had recently looked at the lima implementation so I think this will be a good intersection of what we all want and simplify our scheduler implementations. v2: Rebase on xa_limit_32b API change, and tiny checkpatch cleanups on the way in (unsigned int vs unsigned, extra return before EXPORT_SYMBOL_GPL) Signed-off-by: -
Deepak Rawat authored
Plane property "FB_DAMAGE_CLIPS" can only be used by atomic aware user-space, so no point exposing it otherwise. Cc: <stable@vger.kernel.org> Signed-off-by:
Deepak Rawat <drawat@vmware.com> Reviewed-by:
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Paulo Zanoni authored
Make them take the uncore argument from the caller instead of passing the implicit &dev_priv->uncore directly. This will allow us to finally pass something that's not dev_priv->uncore in the future, and gets rid of the implicit variables in register macros. v2: Rebase on top of the newer patches. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1) Signed-off-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190410235344.31199-6-paulo.r.zanoni@intel.com
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Paulo Zanoni authored
The IRQ initialization helpers are simple and self-contained. Continue the transition started in the recent uncore rework to get us rid of I915_READ/WRITE and the implicit dev_priv variables. While the implicit dev_priv is removed from the IRQ initialization helpers, we didn't get rid of them in the macro callers. Doing that should be very simple now. v2: Rebase on top of the new patches. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1) Signed-off-by:
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Paulo Zanoni authored
This discussion started because we use token pasting in the GEN{2,3}_IRQ_INIT and GEN{2,3}_IRQ_RESET macros, so gen2-4 passes an empty argument to those macros, making the code a little weird. The original proposal was to just add a comment as the empty argument, but Ville suggested we just add a prefix to the registers, and that indeed sounds like a more elegant solution. Now doing this is kinda against our rules for register naming since we only add gens or platform names as register prefixes when the given gen/platform changes a register that already existed before. On the other hand, we have so many instances of IIR/IMR in comments that adding a prefix would make the users of these register more easily findable, in addition to make our token pasting macros actually readable. So IMHO opening an exception here is worth it. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190410235344.31199-4-paulo.r.zanoni@intel.com
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Paulo Zanoni authored
Like the gen3+ macros, the gen2 versions of the IRQ initialization macros take the register name in the 'type' argument. But gen2 only has one set of registers, so there's really no need to specify the type. This commit removes the type argument and uses the registers directly instead of passing them through variables. Signed-off-by:
Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190410235344.31199-3-paulo.r.zanoni@intel.com
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Paulo Zanoni authored
The whole point of having macros here is for the token pasting necessary to automatically have IMR, IIR and IER selected. We don't really need or want all the inlining that happens as a consequence. The good thing about the current code is that it works regardless of the relative offsets between these registers (they change after gen4, with the usual VLV/CHV exceptions). One thing which we can do is to split the logic of what we do with imr/ier/iir to functions separate from the macros that pick them. That's what we do in this commit. This allows us to get rid of the gen8 duplicates and also all the inlining: add/remove: 2/0 grow/shrink: 0/21 up/down: 384/-5949 (-5565) Function old new delta gen3_irq_reset - 233 +233 gen3_irq_init - 151 +151 i8xx_irq_postinstall 459 442 -17 gen11_irq_postinstall 804 744 -60 ironlake_irq_postinstall 450 353 -97 vlv_display_irq_postinstall 348 245 -103 i965_irq_postinstall 378 272 -106 i915_irq_postinstall 333 227 -106 gen8_irq_power_well_post_enable 374 240 -134 ironlake_irq_reset 397 218 -179 vlv_display_irq_reset 616 433 -183 i965_irq_reset 374 180 -194 cherryview_irq_reset 379 185 -194 i915_irq_reset 407 209 -198 ibx_irq_reset 332 133 -199 gen5_gt_irq_postinstall 533 332 -201 gen8_irq_power_well_pre_disable 434 204 -230 gen8_gt_irq_postinstall 469 196 -273 gen8_de_irq_postinstall 1200 836 -364 gen5_gt_irq_reset 471 76 -395 gen8_gt_irq_reset 775 99 -676 gen8_irq_reset 1100 333 -767 gen11_irq_reset 1959 686 -1273 Total: Before=2259222, After=2253657, chg -0.25% v2: - Make checkpatch happy with a temporary which_ (Checkpatch). - Reorder the arguments for the INIT macros (Ville). - Correctly explain when the register offsets change in the commit message (Ville). - Use more line breaks in the macro calls to make the arguments look a little more organized/readable. - Update the bloat-o-meter output (minor change only). Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1) Signed-off-by:
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Joel Stanley authored
The GFX IP is inside of the ASPEED BMC SoC so there is little use enabling it on a kernel that does not support ASPEED. When building with COMPILE_TEST the architecture many not have CMA support, so to avoid breaking the build we only select these options if the architecture supports the contiguous allocator. I suspect the DRM_PANEL came from a cut/paste error. Fixes: 4f2a8f58 ("drm: Add ASPEED GFX driver") Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
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https://github.com/intel/gvt-linuxJoonas Lahtinen authored
gvt-next-2019-04-16 - Refine range of MCHBAR snapshot (Yakui) - Refine out-of-sync page struct (Yakui) - Remove unused vGPU sreg (Yan) - Refind MMIO reg names (Xiaolin) - Proper handling of sync/async flip (Colin) - Proper handling of PIPE_CONTROL/MI_FLUSH_DW index mode (Xiaolin) - EXCC reg mask fix (Colin) Signed-off-by:
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Christian König authored
Instead of checking the upper values of the sequence number use an explicit field in the dma_fence_ops structure to note if a sequence should be 32bit or 64bit. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Link: https://patchwork.freedesktop.org/patch/299655/
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Chris Wilson authored
drivers/gpu/drm/i915/intel_pm.c:8352:9: error: incompatible types in comparison expression (different address spaces) drivers/gpu/drm/i915/intel_pm.c:8359:9: error: incompatible types in comparison expression (different address spaces) Signed-off-by:
Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190412085410.10392-3-chris@chris-wilson.co.uk
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Chris Wilson authored
Since removal of the "missed interrupt detection" nobody used the result of whether or not we signaled anybody during that invocation, so now remove the return value. References: 789659f4 ("drm/i915: Drop fake breadcrumb irq") Signed-off-by:
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Colin Xu authored
According to GFX PRM on 01.org, bit 31:16 of mmio 0x22028 should be masks. Fixes: 17865713 ("drm/i915/gvt: vGPU context switch") Reviewed-by:
Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by:
Colin Xu <colin.xu@intel.com> Signed-off-by:
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Xiaolin Zhang authored
with the introduce of "switch to use HWS indices rather than address", guest GPU hang observed when running workloads which will update the seqno to the real HW HWSP, not vitural GPU HWSP and then cause GPU hang. this patch is to revoke index mode in PIPE_CTRL and MI_FLUSH_DW and patch guest GPU HWSP address value to these commands. Fixes: 54939ea0 ("drm/i915: Switch to use HWS indices rather than addresses") Reviewed-by:
Xiaolin Zhang <xiaolin.zhang@intel.com> Signed-off-by:
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Zhenyu Wang authored
Merge back drm-intel-next for engine name definition refinement and 54939ea0 ("drm/i915: Switch to use HWS indices rather than addresses") that would need gvt fixes to depend on. Signed-off-by:
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- 15 Apr, 2019 5 commits
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Manasi Navare authored
This is one of the patches to start replacing drm pointers and use the intel_atomic_state and intel_crtc to derive the necessary intel state variables required for the intel modeset functions. v3: * Remove the unwanted newline (Ville) v2: * Flip the function arguments (Ville) * Remove some remaining instances of drm pointers (Ville) * Use old_crtc_state and new_crtc_state (Ville) Suggested-by:
Manasi Navare <manasi.d.navare@intel.com> Reviewed-by:
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Chris Wilson authored
If the driver is wedged, we can not issue the requests to exercise the timelines or the system across suspend, so skip the tests. live_hangcheck is there to fail if we cannot recover. Signed-off-by:
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Dave Airlie authored
Need rc5 for udl fix to add udl cleanups on top. Signed-off-by: -
Joshua Aberback authored
[Why] We used this change to investigate the performance of bandwidth validation, it will be useful to have if we need to investigate further. [How] We use performance counter tick numbers to profile performance, they live at dc->debug.bw_val_profile (set .enable in debugger to turn on measuring). Signed-off-by:
Joshua Aberback <joshua.aberback@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet Lakha@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Joshua Aberback authored
Add a fast_validate parameter in dc_validate_global_state for future use Signed-off-by:
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