- 30 Jan, 2015 14 commits
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LEROY Christophe authored
Signed-off-by:
Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by:
Scott Wood <scottwood@freescale.com>
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LEROY Christophe authored
All accessed to PGD entries are done via 0(r11). By using lower part of swapper_pg_dir as load index to r11, we can remove the ori instruction. Signed-off-by:
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LEROY Christophe authored
L1 base address is now aligned so we can insert L1 index into r11 directly and then preserve r10 Signed-off-by:
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LEROY Christophe authored
When pages are not 4K, PGDIR table is allocated with kmalloc(). In order to optimise TLB handlers, aligned memory is needed. kmalloc() doesn't provide aligned memory blocks, so lets use a kmem_cache pool instead. Signed-off-by:
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LEROY Christophe authored
Kernel MMU handling code handles validity of entries via _PMD_PRESENT which corresponds to V bit in MD_TWC and MI_TWC. When the V bit is not set, MPC8xx triggers TLBError exception. So we don't have to check that and branch ourself to TLBError. We can set TLB entries with non present entries, remove all those tests and let the 8xx handle it. This reduce the number of cycle when the entries are valid which is the case most of the time, and doesn't significantly increase the time for handling invalid entries. Signed-off-by:
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LEROY Christophe authored
Since commit 33fb845a ("powerpc/8xx: Don't use MD_TWC for walk"), MD_EPN and MD_TWC are not writen anymore in FixupDAR so saving r3 has become useless. Signed-off-by:
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LEROY Christophe authored
For nohash powerpc, when we run out of contexts, contexts are freed by stealing used contexts in-turn. When a victim has been selected, the associated TLB entries are freed using _tlbil_pid(). Unfortunatly, on the PPC 8xx, _tlbil_pid() does a tlbia, hence flushes ALL TLB entries and not only the one linked to the stolen context. Therefore, as implented today, at each task switch requiring a new context, all entries are flushed. This patch modifies the implementation so that when running out of contexts, all contexts get freed at once, hence dividing the number of calls to tlbia by 16. Signed-off-by:
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Shaohui Xie authored
This binding is for FMan MDIO, it covers FMan v2 & FMan v3. Signed-off-by:
Shaohui Xie <Shaohui.Xie@freescale.com> [scottwood@freescale.com: mark interrupts required only for external] Signed-off-by:
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LEROY Christophe authored
On powerpc 8xx, in TLB entries, 0x400 bit is set to 1 for read-only pages and is set to 0 for RW pages. So we should use _PAGE_RO instead of _PAGE_RW Signed-off-by:
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LEROY Christophe authored
Some powerpc like the 8xx don't have a RW bit in PTE bits but a RO (Read Only) bit. This patch implements the handling of a _PAGE_RO flag to be used in place of _PAGE_RW Signed-off-by:
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Tom Huynh authored
PMCs on PowerPC increases towards 0x80000000 and triggers an overflow interrupt when the msb is set to collect a sample. Therefore, to setup for the next sample collection, pmu_start should set the pmc value to 0x80000000 - left instead of left which incorrectly delays the next overflow interrupt. Same as commit 9a45a940 ("powerpc/perf: power_pmu_start restores incorrect values, breaking frequency events") for book3s. Signed-off-by:
Tom Huynh <tom.huynh@freescale.com> Signed-off-by:
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Emil Medve authored
They seem to be leftovers from '14cf11af powerpc: Merge enough to start building in arch/powerpc' Signed-off-by:
Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by:
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Emil Medve authored
Probably we should have not upstreamed this in the first place Signed-off-by:
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Kim Phillips authored
Fix this: CC arch/powerpc/sysdev/fsl_pci.o arch/powerpc/sysdev/fsl_pci.c: In function 'fsl_pcie_check_link': arch/powerpc/sysdev/fsl_pci.c:91:1: error: the frame size of 1360 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] when configuring FRAME_WARN, by refactoring indirect_read_config() to take hose and bus number instead of the 1344-byte struct pci_bus. Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Signed-off-by:
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- 28 Jan, 2015 7 commits
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Gavin Shan authored
On PowerNV platform, the OPAL interrupts are exported by firmware through device-node property (/ibm,opal::opal-interrupts). Under some extreme circumstances (e.g. simulator), we don't have this property found from the device tree. For that case, we shouldn't allocate the interrupt map. Otherwise, slab complains allocating zero sized memory chunk. Signed-off-by:
Gavin Shan <gwshan@linux.vnet.ibm.com> Signed-off-by:
Michael Ellerman <mpe@ellerman.id.au>
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Gavin Shan authored
The patch put the OPAL interrupt setup logic in opal_init() into seperate function opal_irq_init() for easier code maintaining. The patch doesn't introduce logic changes except: * Rename variable names. * Release virtual IRQ upon error from request_irq(). * Don't cache the virtual IRQ to opal_irqs[] upon error from request_irq(). Suggested-by: -
Michael Ellerman authored
In commit c8742f85 "powerpc/powernv: Expose OPAL firmware symbol map" I added pr_fmt() to opal.c. This left some existing pr_xxx()s with duplicate "opal" prefixes, eg: opal: opal: Found 0 interrupts reserved for OPAL Fix them all up. Also make the "Not not found" message a bit more verbose. Signed-off-by:
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Michael Ellerman authored
Remove slice_set_psize() which is not used. It was added in 3a8247cc "powerpc: Only demote individual slices rather than whole process" but was never used. Remove vsx_assist_exception() which is not used. It was added in ce48b210 "powerpc: Add VSX context save/restore, ptrace and signal support" but was never used. Remove generic_mach_cpu_die() which is not used. Its last caller was removed in 375f561a "powerpc/powernv: Always go into nap mode when CPU is offline". Remove mpc7448_hpc2_power_off() and mpc7448_hpc2_halt() which are unused. These were introduced in c5d56332 "[POWERPC] Add general support for mpc7448hpc2 (Taiga) platform" but were never used. This was partially found by using a static code analysis program called cppcheck. Signed-off-by:
Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> [mpe: Update changelog with details on when/why they are unused] Signed-off-by:
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Michael Ellerman authored
Signed-off-by: -
Michael Ellerman authored
Signed-off-by: -
Kim Phillips authored
arch/powerpc has __kernel_map_pages implementations in mm/pgtable_32.c, and mm/hash_utils_64.c, of which the former is built for PPC32, and the latter for PPC64 machines with PPC_STD_MMU. Fix arch/powerpc/Kconfig to not select ARCH_SUPPORTS_DEBUG_PAGEALLOC when CONFIG_PPC_STD_MMU_64 isn't defined, i.e., for 64-bit book3e builds to use the generic __kernel_map_pages() in mm/debug-pagealloc.c. LD init/built-in.o mm/built-in.o: In function `kernel_map_pages': include/linux/mm.h:2076: undefined reference to `.__kernel_map_pages' include/linux/mm.h:2076: undefined reference to `.__kernel_map_pages' include/linux/mm.h:2076: undefined reference to `.__kernel_map_pages' Makefile:925: recipe for target 'vmlinux' failed make: *** [vmlinux] Error 1 Signed-off-by:
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- 27 Jan, 2015 2 commits
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Pranith Kumar authored
When CONFIG_PRINTK=n, log_buf_addr_get() returns NULL and log_buf_len_get() return 0. Check for these return values and skip registering the dump buffer. Signed-off-by:
Pranith Kumar <bobby.prani@gmail.com> Reviewed-by:
Stewart Smith <stewart@linux.vnet.ibm.com> Signed-off-by:
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Cyril Bur authored
RTAS events require arguments be passed in big endian while hypercalls have their arguments passed in registers and the values should therefore be in CPU endian. The "ibm,suspend_me" 'RTAS' call makes a sequence of hypercalls to setup one true RTAS call. This means that "ibm,suspend_me" is handled specially in the ppc_rtas() syscall. The ppc_rtas() syscall has its arguments in big endian and can therefore pass these arguments directly to the RTAS call. "ibm,suspend_me" is handled specially from within ppc_rtas() (by calling rtas_ibm_suspend_me()) which has left an endian bug on little endian systems due to the requirement of hypercalls. The return value from rtas_ibm_suspend_me() gets returned in cpu endian, and is left unconverted, also a bug on little endian systems. rtas_ibm_suspend_me() does not actually make use of the rtas_args that it is passed. This patch removes the convoluted use of the rtas_args struct to pass params to rtas_ibm_suspend_me() in favour of passing what it needs as actual arguments. This patch also ensures the two callers of rtas_ibm_suspend_me() pass function parameters in cpu endian and in the case of ppc_rtas(), converts the return value. migrate_store() (the other caller of rtas_ibm_suspend_me()) is from a sysfs file which deals with everything in cpu endian so this function only underwent cleanup. This patch has been tested with KVM both LE and BE and on PowerVM both LE and BE. Under QEMU/KVM the migration happens without touching these code pathes. For PowerVM there is no obvious regression on BE and the LE code path now provides the correct parameters to the hypervisor. Signed-off-by:
Cyril Bur <cyrilbur@gmail.com> Signed-off-by:
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- 23 Jan, 2015 17 commits
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Anton Blanchard authored
Add a testcase for the new ppc64 memcmp. Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
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Anton Blanchard authored
I noticed ksm spending quite a lot of time in memcmp on a large KVM box. The current memcmp loop is very unoptimised - byte at a time compares with no loop unrolling. We can do much much better. Optimise the loop in a few ways: - Unroll the byte at a time loop - For large (at least 32 byte) comparisons that are also 8 byte aligned, use an unrolled modulo scheduled loop using 8 byte loads. This is similar to our glibc memcmp. A simple microbenchmark testing 10000000 iterations of an 8192 byte memcmp was used to measure the performance: baseline: 29.93 s modified: 1.70 s Just over 17x faster. v2: Incorporated some suggestions from Segher: - Use andi. instead of rdlicl. - Convert bdnzt eq, to bdnz. It's just duplicating the earlier compare and was a relic from a previous version. - Don't use cr5, we have plans to use that CR field for fast local atomics. Signed-off-by:
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Gavin Shan authored
The callback (ppc_md.pci_probe_mode()) is used to determine if the child PCI devices of the indicated PCI bus should be probed from device-tree or hardware. On PowerNV platform, we always expect probing PCI devices from hardware, which is PowerPC PCI core's default behaviour. Also, the callback had some delay implemented based on PHB's device node property "reset-clear-timestamp", which wasn't exported from skiboot. So we don't need this function and it's safe to remove it. Signed-off-by:
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Gavin Shan authored
When PE's frozen count hits maximal allowed frozen times, which is 5 currently, it will be forced to be offline permanently. Once the PE is removed permanently, rebooting machine is required to bring the PE back. It's not convienent when testing EEH functionality. The patch exports the maximal allowed frozen times through debugfs entry (/sys/kernel/debug/powerpc/eeh_max_freezes). Requested-by:
Ryan Grimm <grimm@linux.vnet.ibm.com> Signed-off-by:
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Gavin Shan authored
The conditions that one specific PE's frozen count exceeds the maximal allowed times (EEH_MAX_ALLOWED_FREEZES) and it's in isolated or recovery state indicate the PE was removed permanently implicitly. The patch introduces flag EEH_PE_REMOVED to indicate that explicitly so that we don't depend on the fixed maximal allowed times, which can be varied as we do in subsequent patch. Flag EEH_PE_REMOVED is expected to be marked for the PE whose frozen count exceeds the maximal allowed times, or just failed from recovery. Requested-by:
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Gavin Shan authored
PE#0 should be regarded as valid for P7IOC, while it's invalid for PHB3. The patch adds flag EEH_VALID_PE_ZERO to differentiate those two cases. Without the patch, we possibly see frozen PE#0 state is cleared without EEH recovery taken on P7IOC as following kernel logs indicate: [root@ltcfbl8eb ~]# dmesg : pci 0000:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0000:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0001:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0001:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0002:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0002:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0003:00 : [PE# 000] Secondary bus 0 associated with PE#0 pci 0003:01 : [PE# 001] Secondary bus 1 associated with PE#1 pci 0003:20 : [PE# 002] Secondary bus 32..63 associated with PE#2 : EEH: Clear non-existing PHB#3-PE#0 EEH: PHB location: U78AE.001.WZS00M9-P1-002 Signed-off-by: -
Gavin Shan authored
When calling to early_setup(), we pick "boot_paca" up for the master CPU and initialize that with initialise_paca(). At that point, the SLB shadow buffer isn't populated yet. Updating the SLB shadow buffer should corrupt what we had in physical address 0 where the trap instruction is usually stored. This hasn't been observed to cause any trouble in practice, but is obviously fishy. Fixes: 6f4441ef ("powerpc: Dynamically allocate slb_shadow from memblock") Signed-off-by:
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Emil Medve authored
num_possible_cpus() is just a shorthand for it. Signed-off-by:
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Naveen N. Rao authored
Currently, all non-dot symbols are being treated as function descriptors in ABIv1. This is incorrect and is resulting in perf probe not working: # perf probe do_fork Added new event: Failed to write event: Invalid argument Error: Failed to add events. # dmesg | tail -1 [192268.073063] Could not insert probe at _text+768432: -22 perf probe bases all kernel probes on _text and writes, for example, "p:probe/do_fork _text+768432" to /sys/kernel/debug/tracing/kprobe_events. In-kernel, _text is being considered to be a function descriptor and is resulting in the above error. Fix this by changing how we lookup symbol addresses on ppc64. We first check for the dot variant of a symbol and look at the non-dot variant only if that fails. In this manner, we avoid having to look at the function descriptor. While at it, also separate out how this works on ABIv2 where we don't have dot symbols, but need to use the local entry point. Signed-off-by:Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by:
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Michael Ellerman authored
Once upon a time, at least 9 years ago (< 2.6.12), _TIF_SYSCALL_T_OR_A meant "TRACE or AUDIT". But these days it means TRACE or AUDIT or SECCOMP or TRACEPOINT or NOHZ. All of those are implemented via syscall_dotrace() so rename the flag to that to try and clarify things. Signed-off-by: -
Michael Ellerman authored
We removed the last usage of CPU_FTR_IABR in commit 1ad7d705 "powerpc/xmon: Enable HW instruction breakpoint on POWER8". Mark it as free. Signed-off-by:
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Paul Mackerras authored
Signed-off-by:
Paul Mackerras <paulus@samba.org> Signed-off-by:
Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> mpe: Fix compile errors and formatting. Add tempfile logic to Makefile. Signed-off-by:
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Anshuman Khandual authored
This patch includes all of the powerpc test binaries into the .gitignore file listing in their respective directories. This will make sure that git ignores all of these test binaries when displaying status. Signed-off-by:
Anshuman Khandual <khandual@linux.vnet.ibm.com> Signed-off-by:
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Wei Yang authored
pci_dn->phb is set to phb in update_dn_pci_info(), if succeed. This patch removes the duplication of pci_dn->phb initialization. Signed-off-by:
Wei Yang <weiyang@linux.vnet.ibm.com> Reviewed-by:
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Thadeu Lima de Souza Cascardo authored
When IOMMU bypass is enabled, a PCI device can read and write memory that was not mapped by the driver without causing an EEH. That might cause memory corruption, for example. When we disable bypass, DMA reads and writes to addresses not mapped by the IOMMU will cause an EEH, allowing us to debug such issues. Signed-off-by:
Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com> Reviewed-by:
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Anshuman Khandual authored
The current handling of EPOW_SHUTDOWN_ON_UPS event does not shutdown the system after logging the message. All the events of EPOW_SYSTEM_SHUTDOWN action code (EPOW_SHUTDOWN_ON_UPS is a part of it) must initiate system shutdown as per the SPAPR spec. If the LPAR does not shutdown after receiving this rtas based event, it will expose itself to a forced abrupt shutdown initiated by the platform firmware. This patch fixes the situation. Signed-off-by:
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Wei Yang authored
The M64 range information is missed in dmesg, which would be helpful in debug. This patch prints the M64 range information in the same format as M32. Signed-off-by:
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