- 26 Sep, 2017 40 commits
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Amy Zhang authored
Signed-off-by:
Amy Zhang <Amy.Zhang@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Dave Airlie authored
There are 2 edp enum revisions, no idea why, drop one, and just assign 1.1 to the default value. Signed-off-by:
Dave Airlie <airlied@redhat.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Dave Airlie authored
We only keep one list of these defines in the kernel, so we should use it. Signed-off-by:
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Harry Wentland authored
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Dave Airlie authored
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Dave Airlie authored
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Dave Airlie authored
While I'm sure this is useful I think we should bring it back later. It's usage of pid/tgid is incorrect, you have to get/put pid/tgids not store them away. Signed-off-by:
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Dave Airlie authored
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Dave Airlie authored
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Anthony Koo authored
Signed-off-by:
Anthony Koo <anthony.koo@amd.com> Reviewed-by:
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Anthony Koo authored
For PQ case, redistribution of segments should be done differently for FP16 case in order to handle content above FP16 value of 1.0 Signed-off-by:
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Zeyu Fan authored
Signed-off-by:
Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by:
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Anthony Koo authored
Refactor part 5 - Regamma programming should be dependent on Output transfer function type Program sRGB gamma or PQ transfer function based on output transfer function. Signed-off-by:
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Anthony Koo authored
Refactor part 4 - Moving input gamma correction programming into color module DM will translate to dc_gamma structure, but programming will be moved into the color module. Later, this will allow gamma correction to be added on top of in/out transfer function curves. Signed-off-by:
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
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Anthony Koo authored
Refactor part 3 - Moving output transfer function from surface to stream Split HWSS to program degamma and regamma separately. Degamma should be dependent on input transfer function. And Regamma should depend on the desired output transfer function. Signed-off-by:
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Roman Li authored
The condition logic of REG_WAIT in dce110_stream_encoder_dp_blank() got inverted after refactoring. Signed-off-by:
Roman Li <Roman.Li@amd.com> Reviewed-by:
Jordan Lazare <Jordan.Lazare@amd.com> Acked-by:
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Yongqiang Sun authored
Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
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Anthony Koo authored
Refactor part 2 - Moving color helper into color module The color module will need table defined in the helper in order to calculate the logical regamma curve, and also to fully handle gamut remapping. Signed-off-by:
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Yongqiang Sun authored
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Jordan Lazare authored
v2: agd: squash in dm fix, rebase Signed-off-by:
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Dave Airlie authored
These are all the ones required by the AMD display core. Signed-off-by:
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Anthony Koo authored
Refactor part 1 of degamma/regamma programming. End goal is to have source and output transfer function in which dc can use to decide how to program the degamma and regamma HW. Gamma will be explicitly applied through dc_update_surfaces_for_target. Color module should build the logical curve with all adjustments applied and pass enough information for dc to program HW PWL. Signed-off-by:
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Yongqiang Sun authored
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Vitaly Prosyak authored
Fix gamma update logic to avoid crash Signed-off-by:
Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by:
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Zeyu Fan authored
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Andrew Wong authored
- Retrieve windowed fullscreen state when getting freesync params. Signed-off-by:
Andrew Wong <andrew.wong1@amd.com> Reviewed-by:
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Andrew Wong authored
- Introduce GRPH_UPDATE_LOCK around programming surface flip. - Remove the now unused graphic surface lock. - Add macros to get and set four registers - both immediate and H Retrace should not be enabled at the same time Signed-off-by:
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Amy Zhang authored
- Gamma correction is not properly copied to the surface after refactor - Make sure gamma correction is copied with correct retain Signed-off-by:
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Yongqiang Sun authored
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Dmytro Laktyushkin authored
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Andrey Grodzovsky authored
Retain a dc_sink pointer until a new physical pointer arrives in case of new display connected. Signed-off-by:
Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by:
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Tony Cheng authored
- dc_update_surfaces_for_target get called in ISR but apply_clk_constraints allocates memory Signed-off-by:
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Tony Cheng authored
- is_new_pipe_surface should be addressed with pipe idx, not surface idx Signed-off-by:
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Harry Wentland authored
Currently we never use more than 2 surfaces in all use cases. This avoids pushing dc_commit_surfaces_to_target beyond a stacksize of 1024. Signed-off-by:
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Harry Wentland authored
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Harry Wentland authored
Some of those are potential bugs Signed-off-by:
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Arindam Nath authored
Some functions like dm_bandwidth_update are placeholders for future implementations. Right now, they simply print messages like "DM_NOT_IMPL: dm_bandwidth_update". This message even though informational, sometimes can create some confusion for users. Since these functions are only skeletons for future, we simply remove the rather un-unecessary messages from these functions. Signed-off-by:
Arindam Nath <arindam.nath@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Ding Wang authored
Signed-off-by:
Ding Wang <Ding.Wang@amd.com> Reviewed-by:
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