- 10 Oct, 2019 26 commits
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Biju Das authored
This patch adds LVDS support for RZ/G2[MN] boards. Signed-off-by:
Biju Das <biju.das@bp.renesas.com> Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://lore.kernel.org/r/1570029619-43238-9-git-send-email-biju.das@bp.renesas.comSigned-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Biju Das authored
This patch enables backlight support. Signed-off-by:
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Biju Das authored
This patch adds PWM device nodes to r8a774b1 SoC DT. Signed-off-by:
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Biju Das authored
The r8a774b1 has a single FDP1 instance. Signed-off-by:
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Biju Das authored
Add display clock properties for the HiHope RZ/G2N board. Signed-off-by:
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Biju Das authored
Add the HDMI encoder to the R8A774B1 DT in disabled state. Signed-off-by:
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Biju Das authored
Add the DU device to r8a774b1 SoC DT. Signed-off-by:
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Biju Das authored
RZ/G2N board is pin compatible with RZ/G2M board. However on the SoC side RZ/G2N uses DU3 where as RZ/G2M uses DU2 for the DPAD. In order to reuse the common dtsi for both the boards, it is required to move du clock properties from common dtsi to board specific dts. Signed-off-by:
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Biju Das authored
Add IPMMU-DS0 to the Ethernet-AVB device node. Based on work by Magnus Damm for the r8a7795. Signed-off-by:
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Biju Das authored
Hook up r8a774b1 DMAC nodes to the IPMMUs. In particular SYS-DMAC0 gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1. Based on work for the r8a7796 by Magnus Damm. Signed-off-by:
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Biju Das authored
The r8a774b1 has 4 VSP instances. Based on the work done for r8a77965 SoC. Signed-off-by:
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Biju Das authored
Add FCPF and FCPV instances to the r8a774b1 dtsi. Based on the work done for r8a77965 SoC. Signed-off-by:
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Biju Das authored
Add RZ/G2N (R8A774B1) IPMMU nodes. Signed-off-by:
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Biju Das authored
Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS) devices nodes to the r8a774b1 device tree. Signed-off-by:
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Biju Das authored
Add SDHI support for the r8a774b1 SoC. Signed-off-by:
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Biju Das authored
This patch adds TMU[01234] device tree nodes to the r8a774b1 SoC specific DT. Signed-off-by:
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Biju Das authored
This patch adds the CMT[0123] device tree nodes to the r8a774b1 SoC specific DT. Signed-off-by:
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Biju Das authored
Add thermal support for R8A774B1 (RZ/G2N) SoC. Based on the work done for r8a77965 SoC. Signed-off-by:
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Biju Das authored
This patch adds OPPs table for CA57{0,1} cpu devices. Signed-off-by: -
Biju Das authored
The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. Signed-off-by:
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Biju Das authored
This patch adds the SoC specific part of the Ethernet AVB device tree node. Signed-off-by:
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Biju Das authored
Add GPIO device nodes to the DT of the r8a774b1 SoC. Signed-off-by:
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Biju Das authored
Add the device nodes for RZ/G2N SCIF and HSCIF serial ports, including clocks, power domains and DMAs. Signed-off-by:
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Biju Das authored
Add sys-dmac[0-2] device nodes for RZ/G2N (R8A774B1) SoC. Signed-off-by:
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Biju Das authored
This patch enables HS400 mode on HiHope RZ/G2N board. Signed-off-by:
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Biju Das authored
This patch removes audio port node from SoC device tree and fixes the below dtb warning Warning (unit_address_vs_reg): /soc/sound@ec500000/ports/port@0: node has a unit name, but no reg property Fixes: e2f04248 ("arm64: dts: renesas: r8a774a1: Add audio support") Signed-off-by:
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- 01 Oct, 2019 12 commits
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Biju Das authored
Basic support for the HiHope RZ/G2N main board: - Memory, - Main crystal, - Serial console Signed-off-by:
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Biju Das authored
Basic support for the RZ/G2N (R8A774B1) SoC. Added placeholders to avoid compilation error with the common platform code. Signed-off-by:
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Biju Das authored
Describe the dynamic power coefficient of A53 CPUs. Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/1568364608-46548-2-git-send-email-biju.das@bp.renesas.comSigned-off-by:
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Biju Das authored
Setup a thermal zone driven by SoC temperature sensor. Create passive trip points and bind them to CPUFreq cooling device that supports power extension. Based on the work done by Dien Pham <dien.pham.ry@renesas.com> and others for r8a77990 SoC. Signed-off-by:
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Kieran Bingham authored
The pwm3 was incorrectly added with a compatible reference to the renesas,pwm-r8a7790 (H2) due to a single characther ommision. Fix the compatible string. Fixes: de625477 ("arm64: dts: renesas: r8a779{7|8}0: add PWM support") Signed-off-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by:
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Dien Pham authored
Enable cpuidle (core shutdown) support for R-Car M3-W CA53 cores. Signed-off-by:
Dien Pham <dien.pham.ry@renesas.com> Signed-off-by:
Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by:
Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/1547808474-19427-5-git-send-email-uli+renesas@fpond.euSigned-off-by:
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Khiem Nguyen authored
Enable cpuidle (core shutdown) support for R-Car M3-W CA57 cores. Parameters were found after evaluation by gaku.inami.xw@bp.renesas.com; they help to keep the performance and reduce the power consumption. Signed-off-by:
Khiem Nguyen <khiem.nguyen.xt@rvc.renesas.com> Signed-off-by:
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Dien Pham authored
Enables cpuidle (core shutdown) support for R-Car H3 CA53 cores. Signed-off-by:
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Khiem Nguyen authored
Enable cpuidle (core shutdown) support for R-Car H3 CA57 cores. Parameters were found after evaluation by gaku.inami.xw@bp.renesas.com; they help to keep the performance and reduce the power consumption. Signed-off-by:
Khiem Nguyen <khiem.nguyen.xt@renesas.com> [dien.pham.ry: Apply new cpuidle parameters] Signed-off-by:
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Jacopo Mondi authored
According to the Renesas R-Car DU bindings documentation, the 'vsps' property should be composed of a phandle to the VSP instance and the index of the LIF channel assigned to the DU channel. Some SoC device tree source files do not specify any LIF channel index, relying on the driver defaulting to 0 if not specified. Align all device tree files by specifying the LIF channel indices as prescribed by the bindings documentation. Reviewed-by:
Jacopo Mondi <jacopo+renesas@jmondi.org> Link: https://lore.kernel.org/r/20190825140135.12150-2-jacopo+renesas@jmondi.org/Signed-off-by:
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Biju Das authored
Add all RZ/G2N Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2d ("List of Clocks [RZ/G2N]") of the RZ/G2N Hardware User's Manual. Signed-off-by: -
Biju Das authored
This patch adds power domain indices for the RZ/G2N (a.k.a r8a774b1) SoC. Signed-off-by:
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- 30 Sep, 2019 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linuxLinus Torvalds authored
Pull btrfs fixes from David Sterba: "A bunch of fixes that accumulated in recent weeks, mostly material for stable. Summary: - fix for regression from 5.3 that prevents to use balance convert with single profile - qgroup fixes: rescan race, accounting leak with multiple writers, potential leak after io failure recovery - fix for use after free in relocation (reported by KASAN) - other error handling fixups" * tag 'for-5.4-rc1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux: btrfs: qgroup: Fix reserved data space leak if we have multiple reserve calls btrfs: qgroup: Fix the wrong target io_tree when freeing reserved data space btrfs: Fix a regression which we can't convert to SINGLE profile btrfs: relocation: fix use-after-free on dead relocation roots Btrfs: fix race setting up and completing qgroup rescan workers Btrfs: fix missing error return if writeback for extent buffer never started btrfs: adjust dirty_metadata_bytes after writeback failure of extent buffer Btrfs: fix selftests failure due to uninitialized i_mode in test inodes
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