- 15 Nov, 2016 1 commit
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Alex Deucher authored
Use the correct define. No functional change as both defines are equivalent. Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- 11 Nov, 2016 36 commits
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Tom St Denis authored
Port the GMC v6 driver over to the new SI headers. Tested with a Tahiti SI ASIC. (v2) Fixed a couple of typos (in commented code) and moved defines to si_enums.h Signed-off-by:Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Rex Zhu authored
Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Christian König authored
This only has the effect of scanning the invisible range twice since the topdown flag is given anyway. Signed-off-by:
JimQu <Jim.Qu@amd.com> Signed-off-by:
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Christian König authored
This disables the VRAM manager when a special placement is requested, otherwise we play ping/pong with the buffers on every command submission. v2: only check lpfn Signed-off-by:
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Rex Zhu authored
1. fix uvd cg status not correct. 2. fix uvd pg can't work on tonga. 3. enable uvd mgcg. Signed-off-by:
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Rex Zhu authored
when uvd is idle, we gate uvd clock. and uvd is busy, we ungate uvd clock. Reviewed-by:
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Rex Zhu authored
Signed-off-by:
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Tom St Denis authored
Add support for the debugfs wave reader. Signed-off-by:
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Tom St Denis authored
This changes the gfx v6 driver to use the new AMDGPU style SI headers. Also fixes a variety of coding style issues, white space issues, and uses WREG32_FIELD in a few places where appropriate. Tested with a Tahiti 0x679A. v2: Squash in typo fix patch Signed-off-by:
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Tom St Denis authored
Add missing gca MMIO registers and defines necessary for the next patch which re-works a lot of gfx v6 to use the new SI headers. Signed-off-by:
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Tom St Denis authored
This introduces the SI registers in the amdgpu driver style. v2: squash duplicates fix Signed-off-by:
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Ravikant B Sharma authored
Replace direct comparisons to NULL i.e. 'x == NULL' with '!x'. As per coding standard. Reviewed-by:
Ravikant B Sharma <ravikant.s2@samsung.com> Signed-off-by:
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Tom St Denis authored
De-numberify indirect register access for gfx v8. Signed-off-by:
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Tom St Denis authored
De-numberify indirect register access for gfx v7. Signed-off-by:
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jimqu authored
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Trigger Huang authored
This patch is used for virtualization support. In virtualization case, Tonga SMC should not be started and SMU firmware should not be loaded if in SRIOV environment. The same operation will be applied on FIJI in other patch. Signed-off-by:
Monk Liu <Monk.Liu@amd.com> Signed-off-by:
Trigger Huang <trigger.huang@amd.com> Reviewed-by:
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Rex Zhu authored
1. partial revert commit 91db308d6e96. not set uvd bypass mode. 2. enable uvd cg before initialize uvd. 3. set uvd clock to default value 100MHz. Signed-off-by:
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Rex Zhu authored
Voltage Controller have been enabled (SMC message) before ULV enablement. Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
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Rex Zhu authored
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Rex Zhu authored
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Rex Zhu authored
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Rex Zhu authored
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Trigger Huang authored
This patch is used for virtualization support. In virtualization case, the initialization sequences are not totally the same as non-Virtualization's. The avfs event manager should be bypassed if in SRIOV virtualization case. At the same, this patch will also bypass starting SMC within SRIOV in FIJI, so the SMU firmware loading will be avoid, which is required in SRIOV. Signed-off-by:
Frank Min <Frank.Min@amd.com> Signed-off-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by:
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Trigger Huang authored
KIQ is used for interaction between driver and CP, and not exposed to outside client, as such it doesn't need to be handled by GPU scheduler. Signed-off-by:
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Trigger Huang authored
Add a new ring type definition for KIQ. KIQ is used for interaction between driver and CP. Signed-off-by:
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Maruthi Srinivas Bayyavarapu authored
UVD clocks are set to be disabled, when not in use. Signed-off-by:
Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by:
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Grazvydas Ignotas authored
Only for cards that are supported by powerplay. Signed-off-by:
Grazvydas Ignotas <notasas@gmail.com> Signed-off-by:
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Grazvydas Ignotas authored
Powerplay hwmgr already has an implementation, all we need to do is to call it. Signed-off-by:
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Huang Rui authored
In fence waiting, it never return -EDEADLK yet, so drop this function here. Signed-off-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
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Huang Rui authored
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Rex Zhu authored
use same module parameter with powercontainment Signed-off-by:
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Rex Zhu authored
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Dave Airlie authored
Merge tag 'zxdrm-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into drm-next ZTE zxdrm driver support for 4.10: This is the initial ZTE VOU display controller DRM/KMS driver. There are still some features to be added, like overlay plane, scaling, and more output devices support. But it's already useful with dual CRTCs and HDMI display working. [airlied: use drm_format_plane_cpp instead of legacy api] * tag 'zxdrm-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: MAINTAINERS: add an entry for ZTE ZX DRM driver drm: zte: add initial vou drm driver dt-bindings: add bindings doc for ZTE VOU display controller
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git://linux-arm.org/linux-ldDave Airlie authored
Here is the list of fixes that I have for drm/mali-dp. They've been on the mailing lists for a while and merged into linux-next for a few weeks, but due to holiday and travel to Linux Plumbers I did not send the pull request earlier. I don't know if these patches can be pulled into v4.9 still (they will conflict with Ville Syrjälä's cleanup of DRM_ROTATE series that is already in drm-next), but if you do that would be great. * 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld: drm: mali-dp: Clear CVAL when leaving config mode drm/arm: mark symbols static where possible drm: mali-dp: Add support for setting plane's rotation property from userspace. drm: mali-dp: Don't set DRM_PLANE_COMMIT_ACTIVE_ONLY drm: mali-dp: Store internal format and n_planes in plane state drm: mali-dp: Enable alpha blending drm: mali-dp: Refactor plane initialisation arm: mali-dp: Extract mode_config cleanup into malidp_fini drm: mali-dp: Add pitch alignment check for planes drm: mali-dp: Add pitch alignment check function drm: mali-dp: Set the drm->irq_enabled flag to match driver's state. drm: mali-dp: Clear the config_valid flag before using it in wait_event.
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- 10 Nov, 2016 3 commits
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
dw-hdmi i2c master controller - add support for the HDMI I2C master controller, for boards that can have their DDC pins connected only to the HDMI TX directly. * tag 'dw-hdmi-next-2016-09-19' of git://git.pengutronix.de/git/pza/linux: drm: bridge/dw_hdmi: add dw hdmi i2c bus adapter support drm: dw_hdmi: use of_get_i2c_adapter_by_node interface
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
imx-drm plane update cleanup, YUV formats - request modeset if plane offsets changed, only the plane base address can be changed without disabling the plane IDMAC channel. - cleanup of plane atomic_update - remove unused ipu_cpmem_set_yuv_planar function - support YUV 4:4:4, 4:2:2, NV12 and NV16 plane formats - not only mask interrupts during irq init, also clear them - remove a legacy check from imx-ldb - add support to set the CSI downsizing bits - silence an obnoxious warning during modeset * tag 'imx-drm-next-2016-11-10' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-di: silence videomode logspam gpu: ipu-v3: add ipu_csi_set_downsize drm/imx: imx-ldb: remove unnecessary double disable check gpu: ipu-v3: initially clear all interrupts drm/imx: ipuv3-plane: add support for YUV 4:2:2 and 4:4:4, NV12, and NV16 formats gpu: ipu-v3: add YUV 4:4:4 support gpu: ipu-cpmem: remove unused ipu_cpmem_set_yuv_planar function drm/imx: ipuv3-plane: let drm_plane_state_to_ubo/vbo handle chroma subsampling other than 4:2:0 drm/imx: ipuv3-plane: merge ipu_plane_atomic_set_base into atomic_update drm/imx: ipuv3-plane: request modeset if plane offsets changed
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
- better atomic state debugging from Rob - fence prep from gustavo - sumits flushed out his backlog of pending dma-buf/fence patches from various people - drm_mm leak debugging plus trying to appease Kconfig (Chris) - a few misc things all over * tag 'topic/drm-misc-2016-11-10' of git://anongit.freedesktop.org/drm-intel: (35 commits) drm: Make DRM_DEBUG_MM depend on STACKTRACE_SUPPORT drm/i915: Restrict DRM_DEBUG_MM automatic selection drm: Restrict stackdepot usage to builtin drm.ko drm/msm: module param to dump state on error irq drm/msm/mdp5: add atomic_print_state support drm/atomic: add debugfs file to dump out atomic state drm/atomic: add new drm_debug bit to dump atomic state drm: add helpers to go from plane state to drm_rect drm: add helper for printing to log or seq_file drm: helper macros to print composite types reservation: revert "wait only with non-zero timeout specified (v3)" v2 drm/ttm: fix ttm_bo_wait dma-buf/fence: revert "don't wait when specified timeout is zero" (v2) dma-buf/fence: make timeout handling in fence_default_wait consistent (v2) drm/amdgpu: add the interface of waiting multiple fences (v4) dma-buf: return index of the first signaled fence (v2) MAINTAINERS: update Sync File Framework files dma-buf/sw_sync: put fence reference from the fence creation dma-buf/sw_sync: mark sync_timeline_create() static drm: Add stackdepot include for DRM_DEBUG_MM ...
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