- 15 Aug, 2017 5 commits
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Andreas Schwab authored
This fixes another invalid use of register expressions. Signed-off-by: Andreas Schwab <schwab@linux-m68k.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
In iommu_range_alloc() we generate a mask by right shifting ~0, however if the specified alignment is 0 then we right shift by 64, which is undefined. UBSAN tells us so: UBSAN: Undefined behaviour in ../arch/powerpc/kernel/iommu.c:193:35 shift exponent 64 is too large for 64-bit type 'long unsigned int' We can avoid it by instead generating the mask with: align_mask = (1ull << align_order) - 1; That will also generate an undefined shift if align_order is 64 or greater, but that shouldn't be a problem for a while. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Anju T authored
In a multi node system with discontiguous node ids, nest event values are not showing up properly. eg. lscpu output: NUMA node0 CPU(s): 0-15 NUMA node8 CPU(s): 16-31 Nest event values on such systems can be counted on CPUs <= 15: $./perf stat -e 'nest_powerbus0_imc/PM_PB_CYC/' -C 0-14 -I 1000 sleep 1000 # time counts unit events 1.000294577 30,17,24,42,880 nest_powerbus0_imc/PM_PB_CYC/ But not on CPUs >= 16: $./perf stat -e 'nest_powerbus0_imc/PM_PB_CYC/' -C 16-28 -I 1000 sleep 1000 # time counts unit events 1.000049902 <not supported> nest_powerbus0_imc/PM_PB_CYC/ This is because, when fetching the reference count, the node id (which may be sparse) is used as the array index, not the node number (which is 0 based and contiguous). Fix it by using the node number as the array index. $./perf stat -e 'nest_powerbus0_imc/PM_PB_CYC/' -C 16-28 -I 1000 sleep 1000 # time counts unit events 1.000241961 26,12,35,28,704 nest_powerbus0_imc/PM_PB_CYC/ Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com> [mpe: Change log tweaks for clarity and brevity] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
In some obscure Book3E configs (randconfig) we can end up missing a definition for PGALLOC_GFP in pgtable_64.c. Fix it by moving the definition to asm/pgalloc.h. Fixes: de3b8761 ("powerpc/mm/book(e)(3s)/64: Add page table accounting") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Naveen N. Rao authored
Exclude core xmon files from ftrace (along with an xmon xive helper outside of xmon/) to minimize impact of ftrace while within xmon. Before: /sys/kernel/debug/tracing# grep -ci xmon available_filter_functions 26 After: /sys/kernel/debug/tracing# grep -ci xmon available_filter_functions 0 Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> [mpe: Use $(subst ..) on KBUILD_CFLAGS rather than CFLAGS_REMOVE_xxx] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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- 14 Aug, 2017 5 commits
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Breno Leitao authored
If tracing is enabled and you get into xmon, the tracing buffer continues to be updated, causing possible loss of data and unnecessary tracing information coming from xmon functions. This patch simple disables tracing when entering xmon, and re-enables it if the kernel is resumed (with 'x'). Signed-off-by: Breno Leitao <leitao@debian.org> Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Breno Leitao authored
Current xmon 'dt' command dumps the tracing buffer for all the CPUs, which makes it very hard to read due to the fact that most of powerpc machines currently have many CPUs. Other than that, the CPU lines are interleaved in the ftrace log. This new option just dumps the ftrace buffer for the current CPU. Signed-off-by: Breno Leitao <leitao@debian.org> Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Bhumika Goyal authored
Make wf_control_ops const as they are only stored in the ops field of a wf_control structure, which is const. Make wf_pid_param const as they are only used during a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal <bhumirks@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Dan Carpenter authored
This function is not called with the nest_init_lock held, and it also unlocks the nest_init_lock immediately below, so it's fairly clear that this is a typo and should be locking the lock. Fixes: 885dcd70 ("powerpc/perf: Add nest IMC PMU support") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
Commit 968159c0 ("powerpc/8xx: Getting rid of remaining use of CONFIG_8xx") removed all but 2 references to 8xx in Kconfigs. This patch removes the two remaining ones. Fixes: 968159c0 ("powerpc/8xx: Getting rid of remaining use of CONFIG_8xx") Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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- 10 Aug, 2017 30 commits
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Michael Ellerman authored
Both xive_core_init() and xive_native_init() are called from and call __init routines, so they should also be __init. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
early_check_vec5() is called from and calls __init routines, so should also be __init. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
head_8xx is dedicated to 8xx so no need to use macros that depends on the CPU Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
Use symbolic names for DSISR bits in DSI Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
For the 8xx, PVR values defined in arch/powerpc/include/asm/reg.h are nowhere used. Remove all defines and add PVR_8xx Use it in arch/powerpc/kernel/cputable.c Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
Two config options exist to define powerpc MPC8xx: * CONFIG_PPC_8xx * CONFIG_8xx arch/powerpc/platforms/Kconfig.cputype has contained the following comment about CONFIG_8xx item for some years: "# this is temp to handle compat with arch=ppc" There is no more users of CONFIG_8xx, so remove it. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
Two config options exist to define powerpc MPC8xx: * CONFIG_PPC_8xx * CONFIG_8xx arch/powerpc/platforms/Kconfig.cputype has contained the following comment about CONFIG_8xx item for some years: "# this is temp to handle compat with arch=ppc" arch/powerpc is now the only place with remaining use of CONFIG_8xx: get rid of them. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
4xx, CPM2 and 8xx cannot be selected at the same time, so no need to test 8xx && !4xx && !CPM2. Testing 8xx is enough. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
The 8xx cannot access the TBL and TBU registers using mfspr/mtspr It must be accessed using mftb/mftbu Due to this, there is a number of places with #ifdef CONFIG_8xx This patch defines new macros MFTBL(x) and MFTBU(x) on the same model as MFTB(x) and tries to make use of them as much as possible. In arch/powerpc/include/asm/timex.h, we also remove the ifdef for the asm() operands as the compiler doesn't mind unused operands Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
mpc8xx_pic.c is dedicated to the 8xx, so move it to platform/8xx Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
To remain consistent with what is done with CPM2, let's link CPM1 related parts to CONFIG_CPM1 instead of CONFIG_8xx When something depends on both CPM1 and CPM2 we associate it with CONFIG_CPM Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
Since commit aa42c69c ("[POWERPC] Add support for FP emulation for the e300c2 core"), program_check_exception() can be called for math emulation. In that case, 'reason' is 0. On the 8xx, there is a Software Emulation interrupt which is called for all unimplemented and illegal instructions. This interrupt calls SoftwareEmulation() which does almost the same as program_check_exception() called with reason = 0. The Software Emulation interrupt sets all reason bits to 0, it is therefore possible to call program_check_exception() directly from the interrupt handler. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
In the same spirit as what was done for 4xx and 44x, move the 8xx machine check into platforms/8xx Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Christophe Leroy authored
The entire 8xx directory is omitted if CONFIG_8xx is not enabled, so within the 8xx/Makefile CONFIG_8xx is always y. So convert obj-$(CONFIG_8xx) to the more obvious obj-y. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Currently we open code the reason codes for program checks. Instead use the existing SRR1 defines. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
We already have mce.c which is built for 64bit and contains other parts of the machine check code, so move these bits in there too. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Make it clear that the fallback version of machine_check_generic() is only used on 32-bit configs. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
get_mc_reason() no longer provides (if it ever really did) any meaningful abstraction, so remove it. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Now that we have 4xx platform directory we can move the 4xx machine check handler in there. Again we drop get_mc_reason() and replace it with regs->dsisr directly (which is actually SPRN_ESR). Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
We have a lot of code in sysdev for supporting 4xx, ie. either 40x or 44x. Instead it would be cleaner if it was all in platforms/4xx. This is slightly odd in that we don't actually define any machines in the 4xx platform, as is usual for a platform directory. But still it seems like a better result to have all this related code in a directory by itself. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
We have several 44x machine check handlers defined in traps.c. It would be preferable if they were split out with the platforms that use them. Do that. In the process, drop get_mc_reason() and instead just open code the lookup of reason from regs->dsisr. This avoids a pointless layer of abstraction. We know to use regs->dsisr because 44x enables BOOKE which enables PPC_ADV_DEBUG_REGS, and FSL_BOOKE is not enabled on 44x builds. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
The entire 44x directory is omitted if CONFIG_44x is not enabled, so within the 44x/Makefile CONFIG_44x is always y. So convert obj-$(CONFIG_44x) to the more obvious obj-y. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman authored
Currently we build the 47x cputable entries even when CONFIG_PPC_47x is disabled. That means a kernel built without CONFIG_PPC_47x will claim to support a 47x CPU and start booting, only to break somewhere later because it doesn't have 47x support compiled in. So guard the 47x cputable entries with CONFIG_PPC_47x. Note that this is inside the #ifdef CONFIG_44x section, because 47x depends on 44x. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Shilpasri G Bhat authored
Adds support for clearing different sensor groups. OCC inband sensor groups like CSM, Profiler, Job Scheduler can be cleared using this driver. The min/max of all sensors belonging to these sensor groups will be cleared. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Shilpasri G Bhat authored
This patch adds support to set power-shifting-ratio which hints the firmware how to distribute/throttle power between different entities in a system (e.g CPU v/s GPU). This ratio is used by OCC for power capping algorithm. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Shilpasri G Bhat authored
Adds a generic powercap framework to change the system powercap inband through OPAL-OCC command/response interface. Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Nicholas Piggin authored
This driver currently reports the H_BEST_ENERGY hypervisor call is unsupported (even when booting in a non-virtualised environment). This is not something the administrator can do much with, and not significant for debugging. Remove it. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Matt Brown authored
This adds emulation for the isel instruction. Tested for correctness against the isel instruction and its extended mnemonics (lt, gt, eq) on ppc64le. Signed-off-by: Matt Brown <matthew.brown.dev@gmail.com> Reviewed-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Matt Brown authored
This adds emulation for the prtyw and prtyd instructions. Tested for logical correctness against the prtyw and prtyd instructions on ppc64le. Signed-off-by: Matt Brown <matthew.brown.dev@gmail.com> Reviewed-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Matt Brown authored
This adds emulation for the bpermd instruction. Tested for correctness against the bpermd instruction on ppc64le. Signed-off-by: Matt Brown <matthew.brown.dev@gmail.com> Reviewed-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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