- 28 Jan, 2008 40 commits
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Jon Loeliger authored
Signed-off-by:
Jon Loeliger <jdl@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Jon Loeliger authored
Also fixed a few minor indent problems as well. Signed-off-by:
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Kumar Gala authored
85xx exists in arch/powerpc as well as cuImage support to boot from a u-boot that doesn't support device trees. Signed-off-by: -
Kumar Gala authored
83xx exists in arch/powerpc as well as cuImage support to boot from a u-boot that doesn't support device trees. Signed-off-by: -
Kim Phillips authored
Signed-off-by:
Joe D'Abbraccio <ljd015@freescale.com> Signed-off-by:
Kim Phillips <kim.phillips@freescale.com> Signed-off-by:
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Kim Phillips authored
Add the dts files for the MPC838xE Reference Development Board (RDB). The board is a mini-ITX reference board with 256M DDR2, 8M flash, 32M NAND, USB, PCI, gigabit ethernet, SATA, and serial. the difference among the three files is the 8377 has two, the 8378 none, and the 8379 has four sata controllers. partially based on the 8379 mds device trees. Signed-off-by:
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Kim Phillips authored
primarily based on mpc837x mds code. Signed-off-by:
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Kim Phillips authored
Signed-off-by:
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Kim Phillips authored
This is used on the mpc8315 SoC for TDM DMA error interrupts. Signed-off-by:
Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by:
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Kim Phillips authored
The mpc8315 shares the same SATA controller as the mpc837x, and likelihood is that future SoCs from Freescale will also. Signed-off-by:
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Kim Phillips authored
Add the dts for the MPC8315E Reference Development Board (RDB). The board is a mini-ITX reference board with 128M DDR2, 8M flash, 32M NAND, USB, PCI, gigabit ethernet, SATA, and serial. Signed-off-by:
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Kim Phillips authored
mpc8315 identical to mpc8313 here, just check compatible. Signed-off-by:
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Kim Phillips authored
prepare for adding support for the mpc8315 rdb, since they are identical wrt platform code. Signed-off-by:
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Anton Vorontsov authored
Also: - rename "fsl_spi" to "fsl,spi"; - add and use cell-index property, if found; - split probing code out of fsl_spi_init, thus we can call it for legacy device_type probing and new "compatible" probing. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
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Anton Vorontsov authored
In case of QE we can use brg-frequency (which is qeclk/2). Thus no need to divide sysclk in the spi_mpc83xx. This patch also adds code to use get_brgfreq() on QE chips. Signed-off-by:
David Brownell <dbrownell@users.sourceforge.net> Signed-off-by:
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Anton Vorontsov authored
device_type property is bogus, thus use proper compatible. Also change compatible property to "fsl,ucc-mdio". Signed-off-by:
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Anton Vorontsov authored
Now we're searching for "fsl,qe", "fsl,qe-muram", "fsl,qe-muram-data" and "fsl,qe-ic". Unfortunately it's still impossible to remove device_type = "qe" from the existing device trees because older u-boots are looking for it. Signed-off-by:
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Kumar Gala authored
* "simple-bus" covers all our needs for of_platform_bus_probe() * make device tree name just 'soc' not 'soc85..' Signed-off-by: -
Paul Gortmaker authored
Move mpc834x_mds device tree source forward to dts-v1 format. Nothing too complex in this one, so it boils down to just adding a bunch of 0x in the right places and converting clock speeds to decimal. Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by:
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Jochen Friedrich authored
Buffer descriptors are used by both CPM1 and CPM2. Move the definitions from the cpm dependent include file to common cpm.h Signed-off-by:
Jochen Friedrich <jochen@scram.de> Signed-off-by:
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Jochen Friedrich authored
Rename commproc.[ch] to cpm1.[ch] to be more consistent with cpm2. Also rename cpm2_common.c to cpm2.c as suggested by Scott Wood. Adjust the includes accordingly. Signed-off-by:
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Jochen Friedrich authored
Directly include mpc885ads.h from mpc885ads_setup.c. Now we can get rid of the arch dependent includes in mpc8xx.h. Signed-off-by:
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Jochen Friedrich authored
Move cpm1 specific prototypes to asm/commproc.h and mpc8xx specific prototypes to asm/mpc8xx.h. Adjust includes accordingly. Remove now unneeded sysdev/commproc.h. Signed-off-by:
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Jochen Friedrich authored
m8xx_calibrate_decr seems to be a misspelled prototype for mpc8xx_calibrate_decr. As it's not needed anyways, just remove it. Signed-off-by:
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Jochen Friedrich authored
m8xx_pic_init calls both mpc8xx_pic_init and cpm_pic_init. Renaming the function to use the same name space as the rest of the mpc8xx specific funtions and to be more meaningful. m8xx_pic_init is declared in ppc8xx_pic.h but defined nowhere in the ppc tree. Remove it. Signed-off-by:
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Jochen Friedrich authored
m8xx_cpm_hostalloc is still defined in commproc.c, but no users are left in the kernel tree. m8xx_cpm_hostfree and m8xx_cpm_hostdump are only defined in the headers. Remove this dead code. Signed-off-by:
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Paul Gortmaker authored
Default config file for SBC8349 board, suitable for use as with NFS as a root file system and gianfar as the NFS root device. Signed-off-by:
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Paul Gortmaker authored
This adds the device tree source for the Wind River SBC834x board. It is based on the MPC834x_MDS DTS, with the biggest difference being the lack of BCSR and the PCI2 that the MDS gets via the PIB. That, and this file is also dts-v1 format. Signed-off-by:
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Paul Gortmaker authored
This adds the basic support for the Wind River SBC834x boards. The SBC8349 is more common, although it should work on the SBC8347 board as well. Support is heavily based on the existing MPC834x_MDS code. Signed-off-by:
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Paul Gortmaker authored
This is a suitable .config file for building the WRS SBC8548 kernel to be used for NFS root via one of the TSEC interfaces and with serial console via the soc/16550 compatible UART. Signed-off-by:
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Paul Gortmaker authored
This adds a v1 device tree source for the Wind River SBC8548 board. The biggest difference between this and the MPC8548CDS reference platform is the absence of the CDS's Arcadia peripherals and physical access to the PCI#2 bus. Signed-off-by:
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Paul Gortmaker authored
This adds the basic support for the Wind River SBC8548 board, implemented as powerpc. It closely follows the implementation of the MPC8548CDS. Signed-off-by:
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Paul Gortmaker authored
This is a suitable .config file for building the WRS SBC8560 kernel to be used for NFS root via one of the TSEC interfaces and with serial console via the 16550 compatible UART on the board. Signed-off-by:
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Paul Gortmaker authored
Currently there is no way to disable the CPM2 support. Some boards, like the SBC8560 have their own external UART and don't have any direct dependencies on the CPM for a serial console or anything else. Signed-off-by:
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Paul Gortmaker authored
This adds a v1 device tree source for the Wind River SBC8560 board. The biggest difference between this and the MPC8560ADS reference platform dts is the use of an external 16550 compatible UART instead of the CPM2. Signed-off-by:
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Paul Gortmaker authored
This adds support for the Wind River SBC8560 board, implemented as powerpc. It closely follows the implementation of the MPC8560ADS. Signed-off-by:
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Paul Gortmaker authored
The legacy_serial was treating each UART parent in a separate code block. Rather than continue this trend for the new parent IDs, this condenses all (soc, tsi, opb, plus two more new types) into one of_device_id array. The new types are wrs,epld-localbus for the Wind River sbc8560, and a more generic "simple-bus" as requested by Scott Wood. Signed-off-by:
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Grant Likely authored
Signed-off-by:
Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
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Li Yang authored
Signed-off-by:
Li Yang <leoli@freescale.com> Signed-off-by:
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Zhang Wei authored
Signed-off-by:
Zhang Wei <wei.zhang@freescale.com> Signed-off-by:
Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by:
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