1. 11 Jun, 2020 2 commits
  2. 10 Jun, 2020 1 commit
  3. 09 Jun, 2020 1 commit
  4. 08 Jun, 2020 1 commit
  5. 02 Jun, 2020 1 commit
  6. 29 May, 2020 25 commits
  7. 28 May, 2020 5 commits
    • Mark Brown's avatar
      Merge series "add ecspi ERR009165 for i.mx6/7 soc family" from Robin Gong <yibin.gong@nxp.com>: · b7d73cb6
      Mark Brown authored
      There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
      transfer to be send twice in DMA mode. Please get more information from:
      https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding
      new sdma ram script which works in XCH  mode as PIO inside sdma instead
      of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be
      exist on all legacy i.mx6/7 soc family before i.mx6ul.
      NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/
      6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips
      still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi'
      for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata
      or not.
      The first two reverted patches should be the same issue, though, it
      seems 'fixed' by changing to other shp script. Hope Sean or Sascha could
      have the chance to test this patch set if could fix their issues.
      Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work
      on i.mx8mm because the event id is zero.
      
      PS:
         Please get sdma firmware from below linux-firmware and copy it to your
      local rootfs /lib/firmware/imx/sdma.
      https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma
      
      v2:
        1.Add commit log for reverted patches.
        2.Add comment for 'ecspi_fixed' in sdma driver.
        3.Add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi'
          rather than remove.
      v3:
        1.Confirm with design team make sure ERR009165 fixed on i.mx6ul/i.mx6ull
          /i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy chips.
          Correct dts related dts patch in v2.
        2.Clean eratta information in binding doc and new 'tx_glitch_fixed' flag
          in spi-imx driver to state ERR009165 fixed or not.
        3.Enlarge burst size to fifo size for tx since tx_wml set to 0 in the
          errata workaroud, thus improve performance as possible.
      v4:
        1.Add Ack tag from Mark and Vinod
        2.Remove checking 'event_id1' zero as 'event_id0'.
      v5:
        1.Add the last patch for compatible with the current uart driver which
          using rom script, so both uart ram script and rom script supported
          in latest firmware, by default uart rom script used. UART driver
          will be broken without this patch.
      v6:
        1.Resend after rebase the latest next branch.
        2.Remove below No.13~No.15 patches of v5 because they were mergered.
        	ARM: dts: imx6ul: add dma support on ecspi
        	ARM: dts: imx6sll: correct sdma compatible
        	arm64: defconfig: Enable SDMA on i.mx8mq/8mm
        3.Revert "dmaengine: imx-sdma: fix context cache" since
          'context_loaded' removed.
      v7:
        1.Put the last patch 13/13 'Revert "dmaengine: imx-sdma: fix context
          cache"' to the ahead of 03/13 'Revert "dmaengine: imx-sdma: refine
          to load context only once" so that no building waring during comes out
          during bisect.
        2.Address Sascha's comments, including eliminating any i.mx6sx in this
          series, adding new 'is_imx6ul_ecspi()' instead imx in imx51 and taking
          care SMC bit for PIO.
        3.Add back missing 'Reviewed-by' tag on 08/15(v5):09/13(v7)
         'spi: imx: add new i.mx6ul compatible name in binding doc'
      v8:
        1.remove 0003-Revert-dmaengine-imx-sdma-fix-context-cache.patch and merge
          it into 04/13 of v7
        2.add 0005-spi-imx-fallback-to-PIO-if-dma-setup-failure.patch for no any
          ecspi function broken even if sdma firmware not updated.
        3.merge 'tx.dst_maxburst' changes in the two continous patches into one
          patch to avoid confusion.
        4.fix typo 'duplicated'.
      
      Robin Gong (13):
        Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
        Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
        Revert "dmaengine: imx-sdma: refine to load context only once"
        dmaengine: imx-sdma: remove duplicated sdma_load_context
        spi: imx: fallback to PIO if dma setup failure
        dmaengine: imx-sdma: add mcu_2_ecspi script
        spi: imx: fix ERR009165
        spi: imx: remove ERR009165 workaround on i.mx6ul
        spi: imx: add new i.mx6ul compatible name in binding doc
        dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
        dma: imx-sdma: add i.mx6ul compatible name
        dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
        dmaengine: imx-sdma: add uart rom script
      
       .../devicetree/bindings/dma/fsl-imx-sdma.txt       |  1 +
       .../devicetree/bindings/spi/fsl-imx-cspi.txt       |  1 +
       arch/arm/boot/dts/imx6q.dtsi                       |  2 +-
       arch/arm/boot/dts/imx6qdl.dtsi                     |  8 +-
       drivers/dma/imx-sdma.c                             | 67 ++++++++++------
       drivers/spi/spi-imx.c                              | 92 +++++++++++++++++++---
       include/linux/platform_data/dma-imx-sdma.h         |  8 +-
       7 files changed, 135 insertions(+), 44 deletions(-)
      
      --
      2.7.4
      
      _______________________________________________
      linux-arm-kernel mailing list
      linux-arm-kernel@lists.infradead.org
      http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
      b7d73cb6
    • Dinghao Liu's avatar
      spi: tegra20-sflash: Fix runtime PM imbalance on error · 117858bd
      Dinghao Liu authored
      pm_runtime_get_sync() increments the runtime PM usage counter even
      when it returns an error code. Thus a pairing decrement is needed on
      the error handling path to keep the counter balanced.
      Signed-off-by: default avatarDinghao Liu <dinghao.liu@zju.edu.cn>
      Link: https://lore.kernel.org/r/20200523124758.28604-1-dinghao.liu@zju.edu.cnSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      117858bd
    • Dinghao Liu's avatar
      spi: tegra20-slink: Fix runtime PM imbalance on error · faedcc17
      Dinghao Liu authored
      pm_runtime_get_sync() increments the runtime PM usage counter even
      when it returns an error code. Thus a pairing decrement is needed on
      the error handling path to keep the counter balanced.
      Signed-off-by: default avatarDinghao Liu <dinghao.liu@zju.edu.cn>
      Link: https://lore.kernel.org/r/20200523122909.25247-1-dinghao.liu@zju.edu.cnSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      faedcc17
    • Dinghao Liu's avatar
      spi: tegra114: Fix runtime PM imbalance on error · cddc36f3
      Dinghao Liu authored
      pm_runtime_get_sync() increments the runtime PM usage counter even
      when it returns an error code. Thus a pairing decrement is needed on
      the error handling path to keep the counter balanced.
      Signed-off-by: default avatarDinghao Liu <dinghao.liu@zju.edu.cn>
      Link: https://lore.kernel.org/r/20200523125704.30300-1-dinghao.liu@zju.edu.cnSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      cddc36f3
    • Robin Gong's avatar
      spi: imx: fallback to PIO if dma setup failure · bcd8e776
      Robin Gong authored
      Fallback to PIO in case dma setup failed. For example, sdma firmware not
      updated but ERR009165 workaroud added in kernel.
      Signed-off-by: default avatarRobin Gong <yibin.gong@nxp.com>
      Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
      Link: https://lore.kernel.org/r/1590006865-20900-6-git-send-email-yibin.gong@nxp.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      bcd8e776
  8. 26 May, 2020 2 commits
  9. 25 May, 2020 2 commits
    • dillon min's avatar
      spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be... · aee67fe8
      dillon min authored
      spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode
      
      since chip spi driver need get the transfer direction by 'tx_buf' and
      'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.
      
      so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
      feature in 'SPI_3WIRE' mode
      Signed-off-by: default avatardillon min <dillon.minfei@gmail.com>
      Link: https://lore.kernel.org/r/1590378348-8115-9-git-send-email-dillon.minfei@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      aee67fe8
    • dillon min's avatar
      spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4 · 61367d0b
      dillon min authored
      in l3gd20 driver startup, there is a setup failed error return from
      stm32 spi driver
      
           "
           [    2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
           regulator
           [    2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
           regulator
           [    2.706707] spi_stm32 40015000.spi: SPI transfer setup failed
           [    2.713741] st-gyro-spi spi0.0: SPI transfer failed: -22
           [    2.721096] spi_master spi0: failed to transfer one message from queue
           [    2.729268] iio iio:device0: failed to read Who-Am-I register.
           [    2.737504] st-gyro-spi: probe of spi0.0 failed with error -22
           "
      
      after debug into spi-stm32 driver, st-gyro-spi split two steps to read
      l3gd20 id
      
      first: send command to l3gd20 with read id command in tx_buf, rx_buf
      is null.
      second: read id with tx_buf is null, rx_buf not null.
      
      so, for second step, stm32 driver recongise this process as 'SPI_SIMPLE_RX'
      from stm32_spi_communication_type(), but there is no related process for this
      type in stm32f4_spi_set_mode(), then we get error from
      stm32_spi_transfer_one_setup().
      
      we can use two method to fix this bug.
      1, use stm32 spi's "In unidirectional receive-only mode (BIDIMODE=0 and
      RXONLY=1)". but as our code running in sdram, the read latency is too large
      to get so many receive overrun error in interrupts handler.
      
      2, use stm32 spi's "In full-duplex (BIDIMODE=0 and RXONLY=0)", as tx_buf is
      null, so add flag 'SPI_MASTER_MUST_TX' to spi master.
      
      Change since V4:
      1 remove dummy data sent out by stm32 spi driver
      2 add flag 'SPI_MASTER_MUST_TX' to spi master
      Signed-off-by: default avatardillon min <dillon.minfei@gmail.com>
      Link: https://lore.kernel.org/r/1590378348-8115-8-git-send-email-dillon.minfei@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      61367d0b