- 30 Jan, 2008 40 commits
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Zhang Xiantao authored
This patch replaces lapic structure with kvm_vcpu in ioapic.c, making ioapic independent of the local apic, as required by ia64. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Carlo Marcelo Arenas Belon authored
This patch removes the KVM specific defines for MSR_EFER that were being used in the svm support file and migrates all references to use instead the ones from the kernel headers that are used everywhere else and that have the same values. Signed-off-by: Carlo Marcelo Arenas Belon <carenas@sajinet.com.pe> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Currently, make headers_check barfs due to <asm/kvm.h>, which <linux/kvm.h> includes, not existing. Rather than add a zillion <asm/kvm.h>s, export kvm.h only if the arch actually supports it. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Other archs doesn't need it. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Unify the special instruction switch with the regular instruction switch, and the two byte special instruction switch with the regular two byte instruction switch. That makes it much easier to find an instruction or the place an instruction needs to be added in. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
The rep prefix cleanup left two switch () statements next to each other. Unify them. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Currently rep processing is handled somewhere in the middle of instruction processing. Move it to a sensible place. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Jerone Young authored
This patch fixes a small issue where sturctures: kvm_pic_state kvm_ioapic_state are defined inside x86 specific code and may or may not be defined in anyway for other architectures. The problem caused is one cannot compile userspace apps (ex. libkvm) for other archs since a size cannot be determined for these structures. Signed-off-by: Jerone Young <jyoung5@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Guillaume Thouvenin authored
Add emulation for the cmps instruction. This lets OpenBSD boot on kvm. Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Sheng Yang authored
Previous patches have removed the dependency on cr2; we can now stop passing it to the emulator and rename uses to 'memop'. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Izik Eidus authored
Mark guest pages as accessed when removed from the shadow page tables for better lru processing. Signed-off-by: Izik Eidus <izike@qumranet.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
mmio was already handled in kvm_arch_vcpu_ioctl_run(), so no need to check again. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Current implementation is to toggle, which is incorrect. Patch ported from corresponding Xen code. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Guillaume Thouvenin authored
cmps and scas instructions accept repeat prefixes F3 and F2. So in order to emulate those prefixed instructions we need to be able to know if prefixes are REP/REPE/REPZ or REPNE/REPNZ. Currently kvm doesn't make this distinction. This patch introduces this distinction. Signed-off-by: Guillaume Thouvenin <guillaume.thouvenin@ext.bull.net> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Non-x86 archs don't need this mechanism. Move it to arch, and keep its interface in common. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Acked-by: Carsten Otte <cotte@de.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Sheng Yang authored
The state of SECONDARY_VM_EXEC_CONTROL shouldn't depend on in-kernel IRQ chip, this patch fix this. Signed-off-by: Sheng Yang <sheng.yang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Dan Kenigsberg authored
The current cpuid management suffers from several problems, which inhibit passing through the host feature set to the guest: - No way to tell which features the host supports While some features can be supported with no changes to kvm, others need explicit support. That means kvm needs to vet the feature set before it is passed to the guest. - No support for indexed or stateful cpuid entries Some cpuid entries depend on ecx as well as on eax, or on internal state in the processor (running cpuid multiple times with the same input returns different output). The current cpuid machinery only supports keying on eax. - No support for save/restore/migrate The internal state above needs to be exposed to userspace so it can be saved or migrated. This patch adds extended cpuid support by means of three new ioctls: - KVM_GET_SUPPORTED_CPUID: get all cpuid entries the host (and kvm) supports - KVM_SET_CPUID2: sets the vcpu's cpuid table - KVM_GET_CPUID2: gets the vcpu's cpuid table, including hidden state [avi: fix original KVM_SET_CPUID not removing nx on non-nx hosts as it did before] Signed-off-by: Dan Kenigsberg <danken@qumranet.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
We don't want the meaning of guest userspace changing under our feet. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Rename the awkwardly named variable. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
These are traditionally named 'page', but even more traditionally, that name is reserved for variables that point to a 'struct page'. Rename them to 'sp' (for "shadow page"). Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Converting last uses along the way. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
No longer used. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Instead of passing an hpa, pass a regular struct page. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Converting a frame number to an address is tricky since the data type changes size. Introduce a function to do it. This fixes an actual bug when accessing guest ptes. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Since set_pte() is now the only caller of set_pte_common(), merge the two functions. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
It is now identical to set_pte(). Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Similar information is available in the gfn parameter, so use that. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Instead of repretitively open-coding this. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Izik Eidus authored
Signed-off-by: Izik Eidus <izike@qumranet.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
If the guest requests just a tlb flush, don't take the vm lock and drop the mmu context pointlessly. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
If all we're doing is increasing permissions on a pte (typical for demand paging), then there's not need to flush remote tlbs. Worst case they'll get a spurious page fault. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
I spent an hour worrying why I see so many guest page faults on FC6 i386. Turns out bypass wasn't implemented for nonpae. Implement it so it doesn't happen again. Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Split kvm_arch_vcpu_create() into kvm_arch_vcpu_create() and kvm_arch_vcpu_setup(), enabling preemption notification between the two. This mean that we can now do vcpu_load() within kvm_arch_vcpu_setup(). Signed-off-by: Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Moving !user_alloc case to kvm_arch to avoid unnecessary code logic in non-x86 platform. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Instead of incrementally changing the mmu cache size for every memory slot operation, recalculate it from scratch. This is simpler and safer. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Instead of fetching one byte at a time, prefetch 15 bytes (or until the next page boundary) to avoid guest page table walks. Signed-off-by: Avi Kivity <avi@qumranet.com>
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