- 23 Nov, 2014 3 commits
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Alexander Kochetkov authored
Delete STAT_AD0 mask as unrelated to current IP (omap1?). Delete DEBUG conditional around SYSTEST masks group. Add SYSTEST functional mode masks for SCL and SDA. Add STAT_BF mask. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Tested-by: Felipe Balbi <balbi@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Max Schwarz authored
The i2c input clock can change dynamically, e.g. on the RK3066 where pclk_i2c0 and pclk_i2c1 are connected to the armclk, which changes rate on cpu frequency scaling. Until now, we incorrectly called clk_get_rate() while holding the i2c->lock in rk3x_i2c_xfer() to adapt to clock rate changes. Thanks to Huang Tao for reporting this issue. Do it properly now using the clk notifier framework. The callback logic was taken from i2c-cadence.c. Also rename all misleading "i2c_rate" variables to "clk_rate", as they describe the *input* clk rate. Signed-off-by: Max Schwarz <max.schwarz@online.de> Tested-by: Doug Anderson <dianders@chromium.org> on RK3288 Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Ludovic Desroches authored
If dma controller is not probed, defer i2c probe. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 21 Nov, 2014 1 commit
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Arnd Bergmann authored
Since at91sam9g45 is now DT-only, all DMA capable users of this driver are using the DT case, and the legacy support can be removed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 19 Nov, 2014 5 commits
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Geert Uytterhoeven authored
This allows checkpatch to validate more DTSes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Geert Uytterhoeven authored
This allows checkpatch to validate more DTSes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
It should be the DMA device, not the platform device. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Yao Yuan <yao.yuan@freescale.com>
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Andrew Bresticker authored
The SCB is present on IMG SoCs other than the META-based TZ1090, such as the MIPS-based Pistachio SoC. Relax the Kconfig dependency so that it can be built on any MIPS or META machine. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 18 Nov, 2014 6 commits
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Beniamino Galvani authored
This is a driver for the I2C controller found in Amlogic Meson SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Gerlando Falauto authored
This makes the topology clearer. For instance, by adding a pca9547 device with address 0x70 to bus i2c-0, you get: /sys/class/i2c-dev/i2c-0/device/0-0070/channel-0 -> i2c-1 ... /sys/class/i2c-dev/i2c-0/device/0-0070/channel-7 -> i2c-8 Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> [wsa: simplified sysfs-usage and fixed format string usage] Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Martin Belanger <martin.belanger@cyaninc.com> Acked-by: Danielle Costantino <danielle.costantino@gmail.com>
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Wolfram Sang authored
The current implementation creates muxed i2c-<n> busses as immediate children of their i2c-<n> parent bus. In case of multiple muxes on one bus, it is impossible to determine which muxed bus comes from which mux. It could be argued that the parent device should be changed from the parent adapter to the mux device. This has pros and cons. To improve the topology, simply add a "mux_device" symlink pointing to the actual muxing device, so we can distinguish muxed busses. Doing it this way, we don't break the ABI. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Tested-by: Guenter Roeck <linux@roeck-us.net>
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Wolfram Sang authored
No need to initialize 'ret' if it gets assigned directly after that. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
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Yao Yuan authored
Add dma support for i2c. This function depend on DMA driver. You can turn on it by write both the dmas and dma-name properties in dts node. DMA is optional, even DMA request unsuccessfully, i2c can also work well. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Yao Yuan authored
If the inlcude headers aren't sorted alphabetically, then the logical choice is to append new ones, however that creates a lot of potential for conflicts or duplicates because every change will then add new includes in the same location. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 17 Nov, 2014 5 commits
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Geert Uytterhoeven authored
Since commit 2fd36c55 ("i2c: core: Map OF IRQ at probe time"), i2c slaves without interrupts (e.g. da9210 and at24 on r8a7791/koelsch) fail to probe: at24: probe of 2-0050 failed with error -22 da9210: probe of 6-0068 failed with error -22 This happens because the call to of_irq_get() in i2c_device_probe() returns -EINVAL. If a device node does not have an "interrupts" property, of_irq_parse_one() fails. Unlike irq_of_parse_and_map(), of_irq_get() does not ignore errors from of_irq_parse_one(), but forwards them. Make i2c_device_probe() ignore all errors but -EPROBE_DEFER to fix this, just like platform_get_irq() and platform_get_irq_byname() already do. Fixes: 2fd36c55 ("i2c: core: Map OF IRQ at probe time") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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James Hogan authored
Add support for the IMG I2C Serial Control Bus (SCB) found on the Pistachio and TZ1090 SoCs. Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> [Ezequiel: code cleaning and rebasing] Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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James Hogan authored
Introduce a devicetree binding for Imagination Technologies I2C SCB controller. Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Thomas Gessler authored
The driver tried to access device registers with the (little-endian) iowrite/ioread functions. While this worked on little-endian machines (e.g. Microblaze with AXI bus), it made the driver unusable on big-endian machines (e.g. PPC405 with PLB). During the probe function, the driver tried to write a 32-bit reset mask into the reset register. This caused an error interrupt on big-endian systems, because the device detected an invalid (byte-swapped) reset mask. The result was an Oops. The patch implements an endianness detection similar to the one used in other Xilinx drivers like drivers/spi/spi-xilinx.c. It was tested on a PPC405/PLB system. Signed-off-by: Thomas Gessler <Thomas.Gessler@exp2.physik.uni-giessen.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Christian Gmeiner authored
I have a at24 EEPROM connected via i2c bus provided by ISCH i2c bus driver. This bus driver does not support I2C_FUNC_SMBUS_WRITE_I2C_BLOCK and so I was looking for a way to be able to write the eeprom. This patch adds support for I2C_SMBUS_BYTE_DATA writing via i2c_smbus_write_byte_data. It is quite slow, but it works. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> [wsa: s/use_smbuse_write/use_smbus_write/] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 12 Nov, 2014 10 commits
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Devin Ryles authored
Signed-off-by: Devin Ryles <devin.ryles@intel.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
No user needs magic hex values, makes this debug output. Add DMA info. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Make it possible to transfer i2c message buffers via DMA. Start/Stop/Sending_Slave_Address is still handled using the old state machine, it is sending the actual data that is done via DMA. This is least intrusive and allows us to work with the message buffers directly instead of preparing a custom buffer which involves copying the data around. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> [wsa: fixed an uninitialized var problem] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Improves readability and reduces chances of duplicates. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wenyou Yang authored
Amend the at91 i2c pin controller to set the state of the pins to: - "default" on resume. - "sleep" on suspend(). This should make it possible to optimize energy usage for the pins both for the suspend/resume cycle Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Danielle Costantino authored
This patch enforces correct I2C error returned codes from Freescale's MPC i2c bus driver, allowing for proper user-space/kernel error handling. Signed-off-by: Danielle Costantino <danielle.costantino@gmail.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jean Delvare authored
Don't log the host status register value in i801_isr(), it has very little value and fills up the log when debugging is enabled. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jean Delvare authored
There is a control bit in the PCI configuration space which disables interrupts. If this bit is set, the driver should not try to make use of interrupts, it won't receive any. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jean Delvare authored
The i2c-i801 driver can work without interrupts, so there is no reason to make a request_irq failure fatal. Instead we can simply fallback to polling. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Jean Delvare authored
Some systems have been reported to have trouble with interrupts. Use wait_event_timeout() instead of wait_event() so we don't get stuck in that case, and log the problem. Signed-off-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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- 10 Nov, 2014 10 commits
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addy ke authored
As show in I2C specification: - Standard-mode: the minimum HIGH period of the scl clock is 4.0us the minimum LOW period of the scl clock is 4.7us - Fast-mode: the minimum HIGH period of the scl clock is 0.6us the minimum LOW period of the scl clock is 1.3us I have measured i2c SCL waveforms in fast-mode by oscilloscope on rk3288-pinky board. the LOW period of the scl clock is 1.3us. It is so critical that we must adjust LOW division to increase the LOW period of the scl clock. Thanks Doug for the suggestion about division formulas. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Mike Looijmans authored
When a signal is caught while the i2c-davinci bus driver is transferring, the driver just "abandons" the transfer and leaves the controller to fend for itself. The next I2C transaction will find the controller in an undefined state and often results in a stream of "initiating i2c bus recovery" messages until the controller arrives in a defined state. This behaviour also sends out "half" or possibly even mixed messages to I2C client devices which may put them in an undesired state as well. So, let's get simply uninterruptible. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wenyou Yang authored
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wenyou Yang authored
Drivers should put the device into low power states proactively whenever the device is not in use. Thus implement support for runtime PM and use the autosuspend feature to make sure that we can still perform well in case we see lots of i2c traffic within short period of time. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Laurent Pinchart authored
I2C clients instantiated from OF get their IRQ mapped at device registration time. This leads to the IRQ being silently ignored if the related irqchip hasn't been proved yet. Fix this by moving IRQ mapping at probe time using of_get_irq(). The function operates as irq_of_parse_and_map() but additionally returns -EPROBE_DEFER if the irqchip isn't available, allowing us to defer I2C client probing. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Laurent Pinchart authored
The function will be used by the I2C core which can be compiled as a module. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Grant Likely <grant.likely@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Geert Uytterhoeven authored
Add support for r8a73a4 (R-Mobile APE6) and sh73a0 (SH-Mobile AG5). On these SoCs, the operating clock runs faster that on previous SoCs, and the internal SCL clock counter gets incremented every 2 clocks of the operating clock, just like on R-Car Gen2. Cfr. the "/2" in the calculation of ICCL/ICCH in section "I2C Bus Interface (IIC)", subsection "Transfer Rate" of the datasheets. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Geert Uytterhoeven authored
Explicitly list the various SoC-specific compatible properties. This allows checkpatch to validate DTSes. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Fabio Estevam authored
According to Documentation/CodingStyle - Chapter 14: "The preferred form for passing a size of a struct is the following: p = kmalloc(sizeof(*p), ...); The alternative form where struct name is spelled out hurts readability and introduces an opportunity for a bug when the pointer variable type is changed but the corresponding sizeof that is passed to a memory allocator is not." So do it as recommeded. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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