- 28 May, 2015 5 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
for amdgpu separately next week. Highlights for radeon: - VCE1 support - Bug fixes and misc cleanups * 'drm-next-4.2' of git://people.freedesktop.org/~agd5f/linux: radeon: Deinline indirect register accessor functions drm/radeon: Fix max_vblank_count value for current display engines drm/radeon: stop using addr to check for BO move drm/radeon: clean up radeon_audio_enable drm/radeon: take the mode_config mutex when dealing with hpds (v2) drm/radeon: make dpcd parameters const drm/radeon: Use DECLARE_BITMAP drm/radeon/tn/si: enable/disable vce cg when encoding v2 drm/radeon: add support for vce 1.0 clock gating drm/radeon: add VCE 1.0 support v4 drm/radeon/dpm: add vce support for SI drm/radeon/dpm: add vce dpm support for TN drm/radeon: implement tn_set_vce_clocks drm/radeon: implement si_set_vce_clocks v2 drm/radeon: allow some more VCE firmware versions drm/radeon: rework VCE FW size calculation drm/radeon: add a GPU reset counter queryable by userspace
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Denys Vlasenko authored
This patch deinlines indirect register accessor functions. These functions perform two mmio accesses, framed by spin lock/unlock. Spin lock/unlock by itself takes more than 50 cycles in ideal case (if lock is exclusively cached on current CPU). With this .config: http://busybox.net/~vda/kernel_config, after uninlining these functions have sizes and callsite counts as follows: r600_uvd_ctx_rreg: 111 bytes, 4 callsites r600_uvd_ctx_wreg: 113 bytes, 5 callsites eg_pif_phy0_rreg: 106 bytes, 13 callsites eg_pif_phy0_wreg: 108 bytes, 13 callsites eg_pif_phy1_rreg: 107 bytes, 13 callsites eg_pif_phy1_wreg: 108 bytes, 13 callsites rv370_pcie_rreg: 111 bytes, 21 callsites rv370_pcie_wreg: 113 bytes, 24 callsites r600_rcu_rreg: 111 bytes, 16 callsites r600_rcu_wreg: 113 bytes, 25 callsites cik_didt_rreg: 106 bytes, 10 callsites cik_didt_wreg: 107 bytes, 10 callsites tn_smc_rreg: 106 bytes, 126 callsites tn_smc_wreg: 107 bytes, 116 callsites eg_cg_rreg: 107 bytes, 20 callsites eg_cg_wreg: 108 bytes, 52 callsites Functions r100_mm_rreg() and r100_mm_rreg() have a fast path and a locked (slow) path. This patch deinlines only slow path. r100_mm_rreg_slow: 78 bytes, 2083 callsites r100_mm_wreg_slow: 81 bytes, 3570 callsites Reduction in code size is more than 65,000 bytes: text data bss dec hex filename 85740176 22294680 20627456 128662312 7ab3b28 vmlinux.before 85674192 22294776 20627456 128598664 7aa4288 vmlinux Signed-off-by:
Denys Vlasenko <dvlasenk@redhat.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: linux-kernel@vger.kernel.org Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Michel Dänzer authored
The value was much too low, which could cause the userspace visible vblank counter to move backwards when the hardware counter wrapped around. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Christian König authored
It is theoretically possible that a swapped out BO gets the same GTT address, but different backing pages while being swapped in. Instead just use another VA state to note updated areas. Signed-off-by:
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Alex Deucher authored
- make it static - fix mask/bool handling for last param Signed-off-by:
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- 26 May, 2015 15 commits
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Alex Deucher authored
Since we are messing with state in the worker. v2: drop the changes in the mst worker Signed-off-by: -
Alex Deucher authored
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Joe Perches authored
Use the generic mechanism to declare a bitmap instead of unsigned long. Signed-off-by:
Joe Perches <joe@perches.com> Signed-off-by:
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Alex Deucher authored
Some of the vce clocks are automatic, others need to be manually enabled. For ease, just disable cg when vce is active. v2: rebased, call vce_v1_0_enable_mgcg directly Signed-off-by:
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Alex Deucher authored
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Christian König authored
Initial support for VCE 1.0 using newest firmware. v2: rebased v3: fix for TN v4: fix FW size calculation Signed-off-by:
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Alex Deucher authored
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Alex Deucher authored
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Alex Deucher authored
This implements the function to set the vce clocks on TN hardware. Signed-off-by: -
Christian König authored
For setting clocks with VCE v1.0 v2: (chk) rebased on current tree Signed-off-by:
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Christian König authored
They seem to work fine with the kernel interface. Signed-off-by:
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Christian König authored
Previously we were completely over allocating, fix this by actually implementing the size calculation. Signed-off-by:
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Marek Olšák authored
Userspace will be able to tell whether a GPU reset occured by comparing an old referece value of the counter with a new value. Reviewed-by:
Marek Olšák <marek.olsak@amd.com> Signed-off-by:
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git://linuxtv.org/pinchartl/fbdevDave Airlie authored
adv7511 fix. * 'drm/next/adv7511' of git://linuxtv.org/pinchartl/fbdev: drm: adv7511: Fix crash in IRQ handler when no encoder is associated
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git://linuxtv.org/pinchartl/fbdevDave Airlie authored
rcar-du fixes * 'drm/next/rcar-du' of git://linuxtv.org/pinchartl/fbdev: drm: rcar-du: Split planes pre-association 4/4 between CRTCs drm: rcar-du: Store the number of CRTCs per group in the group structure drm: rcar-du: Consider plane to CRTC associations in the plane allocator drm: rcar-du: Keep plane to CRTC associations when disabling a plane drm: rcar-du: Add plane allocation debugging drm: rcar-du: Rename to_rcar_du_plane_state to to_rcar_plane_state drm: rcar-du: Embed rcar_du_planes structure into rcar_du_group drm: rcar-du: Move properties from rcar_du_planes to rcar_du_device drm: rcar-du: Document the rcar_du_plane_state structure drm: rcar-du: Document the rcar_du_crtc structure
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- 25 May, 2015 11 commits
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Laurent Pinchart authored
If we have more than one CRTCs in a group pre-associate planes 0-3 with CRTC 0 and planes 4-7 with CRTC 1 to minimize flicker occurring when the association is changed. The pre-association could be controlled by a module parameter if needed. Signed-off-by:Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Laurent Pinchart authored
The number of CRTCs in a group is only used to implement plane initialization for now, but is also needed to implement pre-association of planes to CRTCs. Store it in the group structure instead of computing it on demand. Signed-off-by: -
Laurent Pinchart authored
Hardware planes are driven by the timing generator of the CRTC they are associated to. Changing the association requires restarting the CRTC group that the plane belongs to, resulting in flicker on the other CRTC. To avoid flicker as much as possible, try to allocate planes first from the free planes already associated with the target CRTC. If allocation fails then fall back to allocation from all free planes. Signed-off-by: -
Laurent Pinchart authored
Changing the plane to CRTC associations requires restarting the CRTC group, creating visible flicker. Mitigate the issue by changing plane association only when a plane becomes enabled, not when it get disabled. Signed-off-by: -
Laurent Pinchart authored
Plane allocation is a complex process, add debugging statements to help finding out what could might wrong. Signed-off-by: -
Laurent Pinchart authored
All other cast functions are named without using "du", make the plane state cast consistent with them. Signed-off-by: -
Laurent Pinchart authored
The rcar_du_planes structure contains a single field and is only instantiated in the rcar_du_group structure. Embed it directly and remove the rcar_du_planes structure. Signed-off-by: -
Laurent Pinchart authored
The plane property objects are instantiated once per CRTC group, while they should be instantiated once globally for the device. Fix this and move them to the rcar_du_device structure. Signed-off-by: -
Laurent Pinchart authored
Document the structure fields using kerneldoc. Signed-off-by: -
Laurent Pinchart authored
Document the structure fields using kerneldoc. Signed-off-by: -
Laurent Pinchart authored
The ADV7511 is probed before its slave encoder init function associates it with an encoder. This creates a time window during which hot plug detection interrupts can occur with an encoder, resulting in a crash in the IRQ handler. Fix this by ignoring hot plug detection IRQs when no encoder is associated yet. Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de>
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- 20 May, 2015 1 commit
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Dave Airlie authored
We picked up a silent conflict in amdkfd with drm-fixes and drm-next, backmerge v4.1-rc5 and fix the conflicts Signed-off-by:Dave Airlie <airlied@redhat.com> Conflicts: drivers/gpu/drm/drm_irq.c
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- 19 May, 2015 8 commits
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git://people.freedesktop.org/~gabbayo/linuxDave Airlie authored
- Add the interrupts & events modules, including new IOCTLs to create and wait on events. The HSA RT open source stack is mainly using events to know when a dispatched work has been completed. In addition, this module is a pre-requisite for the next module I'm going to upstream - debugger support This module also handles H/W exceptions, such as memory exception received through the IOMMUv2 H/W and Bad Opcode exception receieved from the GPU. - Adding a new kernel module parameter to let the user decide whether he wants to receive a SIGTERM when a memory exception occurs inside the GPU kernel and the HSA application doesn't wait on an appropriate event, or if he just want to receive notification about this event in dmesg. The default is the latter. - Additional improvements for SDMA code - Update my email address in Maintainers file. * tag 'drm-amdkfd-next-2015-05-19' of git://people.freedesktop.org/~gabbayo/linux: drm/amdkfd: change driver version to 0.7.2 drm/amdkfd: Implement events IOCTLs drm/amdkfd: Add module parameter of send_sigterm drm/amdkfd: Add bad opcode exception handling drm/amdkfd: Add memory exception handling drm/amdkfd: Add the events module drm/amdkfd: add events IOCTL set definitions drm/amdkfd: Add interrupt handling module drm/radeon: Add init interrupt kfd->kgd interface MAINTAINERS: update amdkfd Oded's email address drm/amdkfd: make the sdma vm init to be asic specific drm/amdkfd: Use new struct for asic specific ops drm/amdkfd: reformat some debug prints drm/amdkfd: Remove unessary void pointer cast
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Scattering of random drm core patches. Bunch of atomic prep work too, but the final bits for blob properties, atomic modesets and lifting the experimental tag on the atomic ioctl are still blocked on Daniel Stone finalizing and testing the weston support for it. I hope that we can get it all ready for 4.2 though. * tag 'topic/drm-misc-2015-05-19' of git://anongit.freedesktop.org/drm-intel: (22 commits) drm/atomic: Allow drivers to subclass drm_atomic_state, v3 drm/atomic: remove duplicated assignment of old_plane_state drm/dp: Fix comment in DP helper drm/atomic: add drm_atomic_get_existing_*_state helpers drm/core: get rid of -Iinclude/drm drm/i915: get rid of -Iinclude/drm drm/atomic-helpers: Export drm_atomic_helper_update_legacy_modeset_state drm/atomic-helpers: Update vblank timestamping constants drm/sysfs: remove unnecessary connector type checks drm/sysfs: split DVI-I and TV-out attributes drm/sysfs: make optional attribute groups per connector type drm/sysfs: add a helper for extracting connector type from kobject drm/edid: Add CEA modes before inferred modes drm/prime: Allow internal imports without import_sg_table drm: Add reference counting to blob properties drm: Introduce blob_lock drm: Introduce helper for replacing blob properties drm: Don't leak path blob property when updating drm/atomic: Don't open-code CRTC state destroy drm/edid: Add DMT modes with ID > 0x50 ...
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Oded Gabbay authored
Signed-off-by:Oded Gabbay <oded.gabbay@gmail.com>
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Andrew Lewycky authored
Signed-off-by:
Andrew Lewycky <Andrew.Lewycky@amd.com> Signed-off-by:
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Oded Gabbay authored
This patch adds a new kernel module parameter to amdkfd, called send_sigterm. This parameter specifies whether amdkfd should send the SIGTERM signal to an HSA process, when the following conditions occur: 1. The GPU triggers an exception regarding a kernel that was issued by this process. 2. The HSA process isn't waiting on an event that handles this exception. The default behavior is not to send a SIGTERM and suffice with a dmesg error print. Reviewed-by:
Ben Goz <ben.goz@amd.com> Signed-off-by:
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Alexey Skidanov authored
Signed-off-by:
Alexey Skidanov <alexey.skidanov@gmail.com> Signed-off-by:
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Alexey Skidanov authored
This patch adds Peripheral Page Request (PPR) failure processing and reporting. Bad address or pointer to a system memory block with inappropriate read/write permission cause such PPR failure during a user queue processing. PPR request handling is done by IOMMU driver notifying AMDKFD module on PPR failure. The process triggering a PPR failure will be notified by appropriate event or SIGTERM signal will be sent to it. v3: - Change all bool fields in struct kfd_memory_exception_failure to uint32_t Signed-off-by:
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Andrew Lewycky authored
This patch adds the events module (kfd_events.c) and the interrupt handle module for Kaveri (cik_event_interrupt.c). The patch updates the interrupt_is_wanted(), so that it now calls the interrupt isr function specific for the device that received the interrupt. That function(implemented in cik_event_interrupt.c) returns whether this interrupt is of interest to us or not. The patch also updates the interrupt_wq(), so that it now calls the device's specific wq function, which checks the interrupt source and tries to signal relevant events. v2: Increase limit of signal events to 4096 per process Remove bitfields from struct cik_ih_ring_entry Rename radeon_kfd_event_mmap to kfd_event_mmap Add debug prints to allocate_free_slot and allocate_signal_page Make allocate_event_notification_slot return a correct value Add warning prints to create_signal_event Remove error print from IOCTL path Reformatted debug prints in kfd_event_mmap Map correct size (as received from mmap) in kfd_event_mmap v3: Reduce limit of signal events back to 256 per process Fix allocation of kernel memory for signal events Signed-off-by:
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