- 18 Oct, 2008 9 commits
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Mike Rapoport authored
The patch adds support for NAND flashes connected to GPIOs. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Philip Rakity authored
Signed-off-by: Philip Rakity <prakity@yahoo.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Christopher Moore authored
This patch adds TopBottom detection for most Macronix chips with CFI V1.0. The main purpose of this patch is to add detection of the MX29LV400C B used on the LaCie Ethernet Disk mini V2 NAS. It detects the following parts correctly:- MX28F640C3B T MX29LV002C B MX29LV002NC B MX29LV004C T MX29LV400C T/B MX29LV800C T/B MX29LV160C T/B MX29SL800C T/B MX29SL802C T/B It detects the following uniform part as bottom but it should work correctly:- MX29LV040C For T parts it causes the erase block table to be reversed correctly. For other parts it avoids the bogus "Assuming top" message. It does not detect the following correctly:- MX28F640C3B B MX29LV002C T MX29LV002NC T MX29LV004C B MX29SL400C T/B MX29SL402C T/B If desired I could supply a more complicated patch to handle these as well. Only the MX29LV400C B has been physically tested; others were checked against their data sheets. Signed-off-by: Christopher Moore <moore@free.fr> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Manish Katiyar authored
Below patch fixes the following compilation warnings. drivers/mtd/nand/cs553x_nand.c:293: warning: unused variable 'mtd_parts' drivers/mtd/nand/cs553x_nand.c:292: warning: unused variable 'mtd_parts_nb' Signed-off-by: Manish Katiyar <mkatiyar@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Alexander Belyakov authored
After choosing new c->nextblock, don't leave the wbuf offset field occasionally pointing at the start of the next physical eraseblock. This was causing a BUG() on NOR-ECC (Sibley) flash, where we start writing after the cleanmarker. Among other this fix should cover write buffer offset adjustment after flushing the last page of an eraseblock. Signed-off-by: Alexander Belyakov <abelyako@googlemail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Richard Purdie authored
This makes the driver erase a block when it doesn't find any existing saved log messages which is safer than assuming the flash was already erased. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Richard Purdie authored
Add a magic number to logged kernel oops messages so that they can be more accurately detected rather than just having to rely on the sequence number. This also allows easier detection of saved crashes by userspace. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Richard Purdie authored
Fix an off by one error in the mtdoops driver Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 17 Oct, 2008 1 commit
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Geert Uytterhoeven authored
Make the parameter names of jffs2_compress() in its comments match with the actual implementation Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 14 Oct, 2008 4 commits
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Yoshihiro Shimoda authored
Several Renesas SuperH CPU has FLCTL. The FLCTL support NAND Flash. This driver support SH7723. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Richard Genoud authored
The functions that write the OOB info (on hardware ECC only) use the HW_SYNDROME method. This is not correct : the start position is "pos = eccsize + chunk" and should be eccsize. So, the standard (nand_write_oob_std) function should be used. This patch corrects this by using NAND_ECC_HW instead of NAND_ECC_HW_SYNDROME. This has only been tested on small pages nand flash. (if anyone can test it on large pages that would be great). kernel version : 2.6.27-rc2 (current git mtd-2.6) Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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David Woodhouse authored
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Chen Gong authored
Include missing parts of previous patch. Signed-off-by: Chen Gong <g.chen@freescale.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 13 Oct, 2008 1 commit
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Sebastian Andrzej Siewior authored
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 10 Oct, 2008 3 commits
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Kumar Gala authored
Removed the Kconfig associated with 'NDFC NanD Flash Controller'. We can't enable !CONFIG_PPC_MERGE so there is no way to enable this. Additionally the code needs to get updated for arch/powerpc. For the time being lets just remove the Kconfig option so we can actually remove CONFIG_PPC_MERGE. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Wolfgang Grandegger authored
This patch extends the FSL UPM NAND driver from Anton Vorontsov to support hardware which does not have the R/B pin of the NAND chip connected, like the TQM8548 module: - The OF_GPIO dependency has been removed from the Kconfig option because GPIO is not needed. The relevant gpio_* function are then stubbed out in <linux/gpio.h>. - It re-introduces the chip-delay property to define an appropriate maximum delay time (tR) required for read operations. The binding will be documented in a separate patch. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Anton Vorontsov authored
- Get rid of fsl,wait-pattern and fsl,wait-write. I think this isn't chip-specific, and we should always do waits. I saw one board that didn't need fsl,wait-pattern, but I assume this was the exception that proves the rule; - Get rid of chip-delay. Today there are no users for this, and if anyone really need this they should push the OF bindings beforehand; - Now flash chips should be child nodes of the FSL UPM NAND controller; - Implement OF partition parsing. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 09 Oct, 2008 1 commit
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Deepak Saxena authored
This patch makes debugging a missconfigured UBI a bit easier by providing the needed information in the boot log. Signed-off-by: Deepak Saxena <dsaxena@laptop.org> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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- 08 Oct, 2008 1 commit
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Daniel Rosenthal authored
When iterating over a chain in reverse (oldest block first), this patch correctly marks the PUtable[] entry of the second to last erase block of a chain as BLOCK_NIL, regardless of whether or not it can format the last block successfully. Before, the second to last block was only marked as pointing to BLOCK_NIL if INFTL_formatblock() succeeded on the last block of the chain, which could potentially result in an infinite loop if the block was worn out and refused to format. Signed-off-by: Daniel Rosenthal <danielrosenthal@acm.org> Acked-by: Greg Ungerer <gerg@snapgear.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 27 Sep, 2008 4 commits
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Mike Frysinger authored
...since it only probes that Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Alan Cox authored
Now that the needed helpers are exported, it becomes a nice simple switch over. Closes #9420 Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Alan Cox authored
.... so that they can be used by MTD map drivers. Lets us close #9420 Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Alexander Belyakov authored
The patch fixes CFI issue with multipartitional devices leading to the set of errors or even deadlock. The problem is CFI FL_SYNCING state race with flash operations (e.g. erase suspend). It is reproduced by running intensive writes on one JFFS2 partition and simultaneously performing mount/unmount cycle on another partition of the same chip. Signed-off-by: Alexander Belyakov <abelyako@googlemail.com> Acked-by: Nicolas Pitre <nico@cam.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 26 Sep, 2008 1 commit
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Julien Brunel authored
In case of error, the function add_volume returns an ERR pointer. The result of IS_ERR, which is supposed to be used in a test as it is, is here checked to be less than zero, which seems odd. We suggest to replace this test by a simple IS_ERR test. A simplified version of the semantic match that finds this problem is as follows: (http://www.emn.fr/x-info/coccinelle/) // <smpl> @def0@ expression x; position p0; @@ x@p0 = add_volume(...) @protected@ expression def0.x,E; position def0.p0; position p; statement S; @@ x@p0 ... when != x = E if (!IS_ERR(x) && ...) {<... x@p ...>} else S @unprotected@ expression def0.x,E; identifier fld; position def0.p0; position p != protected.p; @@ x@p0 ... when != x = E * x@p->fld // </smpl> Signed-off-by: Julien Brunel <brunel@diku.dk> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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- 16 Sep, 2008 2 commits
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Karl Beldan authored
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx). The first command sent is NAND_CMD_READID. Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id. Tested with an MT29F4G08AAC. Signed-off-by: Karl Beldan <karl.beldan@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Adrian Hunter authored
Very occasionally, (about one in a million) read operations are ongoing after the timeout has expired. So, retry three times while the ongoing bit remains set. Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 05 Sep, 2008 1 commit
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Artem Bityutskiy authored
We do not need BKL in UBI because we serialize things properly. Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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- 02 Sep, 2008 1 commit
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Sascha Hauer authored
This patch adds support for the integrated NAND flash controller of the i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3 aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Juergen Beisert <j.beisert@pengutronix.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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- 01 Sep, 2008 11 commits
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Enrico Scholz authored
Minor patch to help debugging of NAND detection. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Enrico Scholz authored
This patch moves some attributes out from the platform data into the dynamically created nand device. This results into a cleaner interface and allows to use constant pxa3xx_nand_flash definitions. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Enrico Scholz authored
This patch marks some attributes as 'const' which are set only once and never be modified by the driver. There are some changes in parameter list and variable declarations too which mark them as 'const'. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Enrico Scholz authored
This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which allows to disable usage of builtin flash-type table. Not enabling this option saves some space in the generated driver. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Enrico Scholz authored
This patch adds 'flash' and 'num_flash' attributes to the platform data. There was added code in the driver to iterate across these attributes in the detect-flash routine. This is done similarly to the existing method which uses a 'builtin_flash_types' field. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Enrico Scholz authored
This patch moves the exported datastructures from the pxa3xx_nand.c driver into the <mach/pxa3xx_nand.h> header. This is a plain movement without any modification of the attributes. This is the first one of a set of patches which: * allows to specify used NAND flash in the platform code and allows to turn off the old way to specify NAND characteristics in the driver. This way did not worked well as these characteristics depend on the platform and can not be derived from NAND id alone. E.g. some NAND chips share the same ID (e.g. K9K8G08U0A and K9NBG08U5A) but have different timings (which are written in the common driver currently and must be modified there). * adds 'const' annotations at various places Further patches will be sent to the mtd-list. Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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David Woodhouse authored
It requires cfi_qry_mode_on(), which is in cfi_util.c Reported by Russell King Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Semun Lee authored
Signed-off-by: Semun Lee <semun.lee@samsung.com> Acked-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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David Howells authored
Wrap access to task credentials so that they can be separated more easily from the task_struct during the introduction of COW creds. Change most current->(|e|s|fs)[ug]id to current_(|e|s|fs)[ug]id(). Change some task->e?[ug]id to task_e?[ug]id(). In some places it makes more sense to use RCU directly rather than a convenient wrapper; these will be addressed by later patches. Signed-off-by: David Howells <dhowells@redhat.com> Reviewed-by: James Morris <jmorris@namei.org> Acked-by: Serge Hallyn <serue@us.ibm.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Alexey Dobriyan authored
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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