- 09 Nov, 2018 1 commit
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Paul Kocialkowski authored
Passing the encoder to the TCON RGB setup functions allows accessing the connector from the encoder directly instead of relying on the panel. Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Signed-off-by:
Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181107181843.27628-2-contact@paulk.fr
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- 08 Nov, 2018 1 commit
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Christian König authored
Until we have sorted out all problems. v2: return -EINVAL during create if flag is set. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/260937/
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- 07 Nov, 2018 3 commits
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Ville Syrjälä authored
Convert drm_atomic_plane_check() over to using explicit old vs. new plane states. Avoids the confusion of "what does plane->state mean again?". v2: Stick to the multi-stage logic in plane_switching_crtc() (Daniel) Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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Ville Syrjälä authored
Convert drm_atomic_crtc_check() over to using explicit old vs. new crtc states. Avoids the confusion of "what does crtc->state mean again?". Signed-off-by:
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Ville Syrjälä authored
Replace 'crtc->state' with the explicit old crtc state. Actually it shouldn't matter whether we use the old or the new crtc state here since any plane that has been removed from the crtc since the crtc state was duplicated will have been added to the atomic state already. That is, you can't call drm_atomic_set_crtc_for_plane() without having the new plane state already in hand. Signed-off-by:
Harry Wentland <harry.wentland@amd.com>
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- 06 Nov, 2018 5 commits
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Ville Syrjälä authored
Add a function to check whether there is at least one plane that supports a specific format and modifier combination. Drivers can use this to reject unsupported formats/modifiers in .fb_create(). v2: Accept anyformat if the driver doesn't do planes (Eric) s/planes_have_format/any_plane_has_format/ (Eric) Check the modifier as well since we already have a function that does both v3: Don't do the check in the core since we may not know the modifier yet, instead export the function and let drivers call it themselves Cc: Eric Anholt <eric@anholt.net> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by:Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181029183453.28541-1-ville.syrjala@linux.intel.com
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Daniel Vetter authored
It's lockless, and userspace might chance it underneath us. That's not really a problem, all userspace gets is a slightly dysfunctional lease with the current code. But this might change, and gcc might decide to reload a few too many times, and then boom. So better safe than sorry. v2: Remove the now unused lessor_priv argument from validate_lease() (Keith). v3: Actually add everything ... silly me. Cc: Keith Packard <keithp@keithp.com> Cc: Dave Airlie <airlied@gmail.com> Acked-by:
Keith Packard <keithp@keithp.com> Signed-off-by:
Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181105101211.22737-1-daniel.vetter@ffwll.ch
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Daniel Vetter authored
This essentially undoes commit 39868bd7 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Tue Oct 29 08:55:58 2013 +0000 drm: Compact booleans within struct drm_file We do lockless access to these flags everywhere, and it's kinda not a great idea to mix lockless and bitfields. Aside from that gcc isn't generating great code for these. If this ever becomes an issue size-wise, I think we need atomic_t here and atomic bitflag ops. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: David Herrmann <dh.herrmann@gmail.com> Cc: Dave Airlie <airlied@redhat.com> Acked-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
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Daniel Vetter authored
I spent a bit of time scratching heads and figuring out why the igts don't work. Probably useful to keep this work. Cc: Keith Packard <keithp@keithp.com> Cc: Dave Airlie <airlied@gmail.com> Acked-by:
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Eric Anholt authored
This broke rendering on V3D, where we almost always have a 0 in-syncobj. Signed-off-by:
Eric Anholt <eric@anholt.net> Fixes: 48197bc5 ("drm: add syncobj timeline support v9") Cc: Chunming Zhou <david1.zhou@amd.com> Cc: Christian König <christian.koenig@amd.com> Reviewed-by:
Chunming Zhou <david1.zhou@amd.com> Acked-by:
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- 05 Nov, 2018 22 commits
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Imre Deak authored
Fix typo in struct field initializer. Fixes: 3a6eb795 ("drm/vgem: create a render node for vgem") Cc: Emil Velikov <emil.velikov@collabora.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Signed-off-by:
Imre Deak <imre.deak@intel.com> Reviewed-by:
Emil Velikov <emil.velikov@collabora.com> Signed-off-by:
Emil Velikov <emil.l.velikov@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181105145428.5590-1-imre.deak@intel.com
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Emil Velikov authored
VGEM doesn't do anything modeset specific, so in a way exposing a primary node is 'wrong'. At the same time, we extensively use if for creating dumb buffers, fences, prime fd <> handle imports/exports. To the point that we explicitly annotate the vgem fence ioctls as DRM_RENDER_ALLOW and have an IGT test which opens the render node. close(drm_open_driver_render(DRIVER_VGEM)) Better late than never, let's flip the switch. Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
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Icenowy Zheng authored
The TCON TOP on Allwinner H6 SoC is a cut down version of the R40 TCON TOP, which dropped TCON_TV1 and DSI (which do not exist on H6). Add support for it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Signed-off-by:
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Icenowy Zheng authored
Allwinner H6 SoC has a cut down version of TCON TOP. Add binding documentation for it. Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by:
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Icenowy Zheng authored
Some SoCs, such as H6, doesn't have a full-featured TCON TOP. Add quirks support for TCON TOP. Currently the presence of TCON_TV1 and DSI is controlled via the quirks structure. Acked-by:
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Jernej Skrabec authored
It turns out that TCON TOP registers in H6 SoC have non-zero reset value. This may cause issues if bits are not changed during configuration. To prevent that, initialize registers to 0. Signed-off-by:
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Jernej Skrabec authored
H6 has Synopsys DWC HDMI 2.0 TX PHY. There is no freely available documentation for it, only code found in BSP kernel. However, judging by the code, PHY is very similar to older Synopsys HDMI PHY described in i.MX6 documentation. Most registers seem to be the same. According to i.MX6 documentation, mpll settings are based on pixel clock and are not specific to each SoC. Because of that, mpll table in this commit is based on that documentation and not on BSP code. Other PHY settings were derived from BSP PHY driver code. Signed-off-by:
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Jernej Skrabec authored
Currently sun8i-hdmi-phy driver supports only custom PHYs connected to DW HDMI controller. Since newest Allwinner SoCs have unmodified Synopsys PHY, driver has to be reorganized to support them. Variant structure is expanded to allow differentiation between custom and Sysnopsys PHYs and to hold Synopsys PHY settings. Since DW HDMI bridge platform data has different fields for custom and Sysnopsys PHY, function sun8i_hdmi_phy_get_ops() is replaced with sun8i_hdmi_phy_set_ops(). Signed-off-by:
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Jernej Skrabec authored
Currently, quirks and compatibles are sorted alphabetically. However, they should be sorted by family release date and then alphabetically. Fix that by moving A64 quirks and compatible to bottom. No functional change is made. Signed-off-by:
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Jernej Skrabec authored
H6 has DW HDMI 2.0b controller v2.12a. It supports 4K at 60 Hz and HDCP 2.2. Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
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Icenowy Zheng authored
The Allwinner H6 SoC uses a v2.12a DesignWare HDMI controller, with dedicated CEC and HDCP clocks added; the PHY connected is a standard DesignWare HDMI PHY. Add binding for it. Reviewed-by:
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Jernej Skrabec authored
It turns out that H6 HDMI BSP kernel driver doesn't change TMDS rate at all. At this point it is not clear whether it is just not necessary or it would cause some kind of issues. Add a quirk for it. Acked-by:
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Jernej Skrabec authored
Since it is not possible to access sun8i-dw-hdmi driver private data inside mode_valid function, make it configurable. That way different versions of HDMI controllers can set different function, depending on it's limitations. Reviewed-by:
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Jernej Skrabec authored
Currently supported Allwinner SoCs with DW HDMI controller have scrambled addresses and read lock. However, that is not true in general. For example, A80 and H6 have normal addresses and normal read access. Move code for unscrambling addresses and unlocking read access to it's own function and call it from init function. Reviewed-by:
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Jernej Skrabec authored
It turns out that even new DW HDMI controllers exhibits same magenta line issues as older versions. Enable workaround for v2.12a. Reviewed-by:
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Jernej Skrabec authored
Mixer 0 has 1 VI and 3 UI planes, scaler on all planes and can output 4K image @60Hz. It also support 10 bit colors, which are not yet implemented. Reviewed-by:
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Jernej Skrabec authored
Display Engine 3 is an upgrade of DE2 with new features like support for 10 bit color formats and support for AFBC. Most of DE2 code works with DE3, except some small details. Implement basic support for DE3. Support for 10 bit colort formats and AFBC, among others missing features, will be added later. Signed-off-by:
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Jernej Skrabec authored
Some sub-engines are unused. Disable them explicitly. Signed-off-by:
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Jernej Skrabec authored
DE2 mixer is always 0x6000 bytes in size on all known SoCs. While at it, introduce a macro for that. Signed-off-by:
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Jernej Skrabec authored
Most, if not all, registers found in DE2 still exists in DE3. However, units are on different base addresses. To prepare for addition of DE3 support, registers macros are reworked so they take base address as parameter. Signed-off-by:
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Jernej Skrabec authored
This commit adds compatibles used in H6 display pipeline, namely for display engine, mixer and TV TCON. H6 display engine is somewhat similar to R40, just less TCONs and mixer support more features. Reviewed-by:
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Icenowy Zheng authored
The Allwinner H6 DE3 bus is similar to the A64 DE2 one. Add its compatible string with the A64 string as fallback to the binding. Some description of the binding is modified to make it more generic. Reviewed-by:
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- 02 Nov, 2018 8 commits
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Daniel Vetter authored
Leases are entirely implemented within drm.ko, no need to even tempt drivers into doing nasty things. And if there's really a need, we can always re-export these again. Cc: Keith Packard <keithp@keithp.com> Cc: Dave Airlie <airlied@gmail.com> Acked-by:
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Alexandru-Cosmin Gheorghe authored
It seems for some random configuration drm_device is bigger than 2048 bytes. The fix is to make the mock objects static variables. Bug reported by 0-DAY Kernel test infrastructure here: https://lists.01.org/pipermail/kbuild-all/2018-November/054431.html Fixes: 6ff3d9ff ("drm/selftests: Add tests for drm_internal_framebuffer_create") Signed-off-by:
Alexandru-Cosmin Gheorghe <alexandru-cosmin.gheorghe@arm.com> Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181102130103.7753-1-alexandru-cosmin.gheorghe@arm.com
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Alexandru Gheorghe authored
Add tests that verify that drm_internal_framebuffer_create creates buffers correctly by creating a dummy drm_device with a mock function for the fb_create callback. To decide if a buffer has been created or not it just checks if fb_create callback has been called for the particular drm_mode_fb_cmd2 that's being tested. Reviewed-by:
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Alexandru Gheorghe authored
If we want to be able to write drmselftests for non-static core functions that are not intended to be used by drivers we need this functions to be exported. This adds a macro that is tied of CONFIG_DRM_DEBUG_SELFTEST, and uses that to export drm_internal_framebuffer_create, in order for subsequent patches to be able to test it. Reviewed-by:
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Alexandru Gheorghe authored
Add selftests for the following newly added functions: - drm_format_info_block_width - drm_format_info_block_height - drm_format_info_min_pitch Reviewed-by:
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Alexandru Gheorghe authored
For formats that are supported only with non-linear modifiers it doesn't make to much sense to define cpp or char_per_block, so that will be set to 0. This patch adds a restriction to force having a modifier attached when cpp/char_per_block is 0, and to bypass checking the pitch restriction. This had been discussed here. [1] https://people.freedesktop.org/~cbrill/dri-log/?channel=dri-devel&highlight_names=&date=2018-09-13&show_html=trueReviewed-by:
Brian Starkey <brian.starkey@arm.com> Reviewed-by:
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Alexandru Gheorghe authored
Enable the following formats - DRM_FORMAT_X0L0: DP650 - DRM_FORMAT_X0L2: DP550, DP650 Reviewed-by:
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Alexandru Gheorghe authored
Mali-DP implements a number of tiled yuv formats which are not currently described in drm_fourcc.h. This adds those definitions and describes their memory layout by using the newly added char_per_block, block_w, block_h. Reviewed-by:
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