1. 23 Mar, 2016 8 commits
  2. 22 Mar, 2016 1 commit
  3. 21 Mar, 2016 1 commit
  4. 18 Mar, 2016 2 commits
  5. 11 Mar, 2016 2 commits
    • Sukadev Bhattiprolu's avatar
      perf test: Remove 'core_id' check in topo test · 4c9d6c18
      Sukadev Bhattiprolu authored
      The topology test case of 'perf test' seems to be broken on my x86
      system - due to the comparison of a "core-id" with # of CPUs online.
      
      There are 8 online CPUs:
      
      	$ cat /sys/devices/system/cpu/online
      	0-7
      
      but core-ids are not sequential and some core-ids exceed the number
      of online CPUs.
      
      	$ cat /sys/devices/system/cpu/cpu?/topology/core_id
      	0
      	1
      	9
      	10
      	0
      	1
      	9
      	10
      
      Looks like we can safely remove the check.  Output before:
      
      	$ perf --version
      	perf version 4.4.rc1.g34258a
      
      	$ perf test -v topo
      	36: Test topology in session                                 :
      	--- start ---
      	test child forked, pid 5906
      	templ file: /tmp/perf-test-vCwWG3
      	core_id number is too big.You may need to upgrade the perf tool.
      	test child interrupted
      	---- end ----
      	Test topology in session: FAILED!
      
      and after:
      
      	$ perf test -v topo
      	36: Test topology in session                                 :
      	--- start ---
      	test child forked, pid 6532
      	templ file: /tmp/perf-test-y10wFJ
      	CPU 0, core 0, socket 0
      	CPU 1, core 1, socket 0
      	CPU 2, core 9, socket 0
      	CPU 3, core 10, socket 0
      	CPU 4, core 0, socket 1
      	CPU 5, core 1, socket 1
      	CPU 6, core 9, socket 1
      	CPU 7, core 10, socket 1
      	test child finished with 0
      	---- end ----
      	Test topology in session: Ok
      Signed-off-by: default avatarSukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
      Cc: Jan Stancek <jstancek@redhat.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Kan Liang <kan.liang@intel.com>
      Link: http://lkml.kernel.org/r/20151203233219.GA27696@us.ibm.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      4c9d6c18
    • Ingo Molnar's avatar
      Merge tag 'perf-core-for-mingo-20160310' of... · ced30bc9
      Ingo Molnar authored
      Merge tag 'perf-core-for-mingo-20160310' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux into perf/core
      
      Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo:
      
      User visible changes:
      
        - Implement 'perf stat --metric-only' (Andi Kleen)
      
        - Fix perf script python database export crash (Chris Phlipot)
      
      Infrastructure changes:
      
        - perf top/report --hierarchy assorted fixes for problems introduced in this
          perf/core cycle (Namhyung Kim)
      
        - Support '~' operation in libtraceevent (Steven Rosted)
      
      Build fixes:
      
        - Fix bulding of jitdump on opensuse on ubuntu systems when the DWARF
          devel files are not installed (Arnaldo Carvalho de Melo)
      
        - Do not try building jitdump on unsupported arches (Jiri Olsa)
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      ced30bc9
  6. 10 Mar, 2016 15 commits
  7. 09 Mar, 2016 5 commits
  8. 08 Mar, 2016 6 commits
    • Borislav Petkov's avatar
      perf/x86/intel/rapl: Simplify quirk handling even more · 7a869805
      Borislav Petkov authored
      Drop the quirk() function pointer in favor of a simple boolean which
      says whether the quirk should be applied or not. Update comment while at
      it.
      Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Andi Kleen <andi.kleen@intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Harish Chegondi <harish.chegondi@intel.com>
      Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Kan Liang <kan.liang@intel.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Stephane Eranian <eranian@google.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Vince Weaver <vincent.weaver@maine.edu>
      Cc: linux-tip-commits@vger.kernel.org
      Link: http://lkml.kernel.org/r/20160308164041.GF16568@pd.tnicSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      7a869805
    • Kostenzer Felix's avatar
      x86/nmi: Mark 'ignore_nmis' as __read_mostly · 8e2a7f5b
      Kostenzer Felix authored
      ignore_nmis is used in two distinct places:
      
       1. modified through {stop,restart}_nmi by alternative_instructions
       2. read by do_nmi to determine if default_do_nmi should be called or not
      
      thus the access pattern conforms to __read_mostly and do_nmi() is a fastpath.
      Signed-off-by: default avatarKostenzer Felix <fkostenzer@live.at>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      8e2a7f5b
    • Andi Kleen's avatar
      perf/x86/intel: Fix PEBS data source interpretation on Nehalem/Westmere · e17dc653
      Andi Kleen authored
      Jiri reported some time ago that some entries in the PEBS data source table
      in perf do not agree with the SDM. We investigated and the bits
      changed for Sandy Bridge, but the SDM was not updated.
      
      perf already implements the bits correctly for Sandy Bridge
      and later. This patch patches it up for Nehalem and Westmere.
      Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: <stable@vger.kernel.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: jolsa@kernel.org
      Link: http://lkml.kernel.org/r/1456871124-15985-1-git-send-email-andi@firstfloor.orgSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      e17dc653
    • Stephane Eranian's avatar
      perf/x86/pebs: Add proper PEBS constraints for Broadwell · b3e62463
      Stephane Eranian authored
      This patch adds a Broadwell specific PEBS event constraint table.
      
      Broadwell has a fix for the HT corruption bug erratum HSD29 on
      Haswell. Therefore, there is no need to mark events 0xd0, 0xd1, 0xd2,
      0xd3 has requiring the exclusive mode across both sibling HT threads.
      This holds true for regular counting and sampling (see core.c) and
      PEBS (ds.c) which we fix in this patch.
      
      In doing so, we relax evnt scheduling for these events, they can now
      be programmed on any 4 counters without impacting what is measured on
      the sibling thread.
      Signed-off-by: default avatarStephane Eranian <eranian@google.com>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: acme@redhat.com
      Cc: adrian.hunter@intel.com
      Cc: jolsa@redhat.com
      Cc: kan.liang@intel.com
      Cc: namhyung@kernel.org
      Link: http://lkml.kernel.org/r/1457034642-21837-4-git-send-email-eranian@google.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      b3e62463
    • Stephane Eranian's avatar
      perf/x86/pebs: Add workaround for broken OVFL status on HSW+ · 8077eca0
      Stephane Eranian authored
      This patch fixes an issue with the GLOBAL_OVERFLOW_STATUS bits on
      Haswell, Broadwell and Skylake processors when using PEBS.
      
      The SDM stipulates that when the PEBS iterrupt threshold is crossed,
      an interrupt is posted and the kernel is interrupted. The kernel will
      find GLOBAL_OVF_SATUS bit 62 set indicating there are PEBS records to
      drain. But the bits corresponding to the actual counters should NOT be
      set. The kernel follows the SDM and assumes that all PEBS events are
      processed in the drain_pebs() callback. The kernel then checks for
      remaining overflows on any other (non-PEBS) events and processes these
      in the for_each_bit_set(&status) loop.
      
      As it turns out, under certain conditions on HSW and later processors,
      on PEBS buffer interrupt, bit 62 is set but the counter bits may be
      set as well. In that case, the kernel drains PEBS and generates
      SAMPLES with the EXACT tag, then it processes the counter bits, and
      generates normal (non-EXACT) SAMPLES.
      
      I ran into this problem by trying to understand why on HSW sampling on
      a PEBS event was sometimes returning SAMPLES without the EXACT tag.
      This should not happen on user level code because HSW has the
      eventing_ip which always point to the instruction that caused the
      event.
      
      The workaround in this patch simply ensures that the bits for the
      counters used for PEBS events are cleared after the PEBS buffer has
      been drained. With this fix 100% of the PEBS samples on my user code
      report the EXACT tag.
      
      Before:
        $ perf record -e cpu/event=0xd0,umask=0x81/upp ./multichase
        $ perf report -D | fgrep SAMPLES
        PERF_RECORD_SAMPLE(IP, 0x2): 11775/11775: 0x406de5 period: 73469 addr: 0 exact=Y
                                 \--- EXACT tag is missing
      
      After:
        $ perf record -e cpu/event=0xd0,umask=0x81/upp ./multichase
        $ perf report -D | fgrep SAMPLES
        PERF_RECORD_SAMPLE(IP, 0x4002): 11775/11775: 0x406de5 period: 73469 addr: 0 exact=Y
                                 \--- EXACT tag is set
      
      The problem tends to appear more often when multiple PEBS events are used.
      Signed-off-by: default avatarStephane Eranian <eranian@google.com>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: <stable@vger.kernel.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Vince Weaver <vincent.weaver@maine.edu>
      Cc: adrian.hunter@intel.com
      Cc: kan.liang@intel.com
      Cc: namhyung@kernel.org
      Link: http://lkml.kernel.org/r/1457034642-21837-3-git-send-email-eranian@google.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      8077eca0
    • Stephane Eranian's avatar
      perf/x86/intel: Add definition for PT PMI bit · 5690ae28
      Stephane Eranian authored
      This patch adds a definition for GLOBAL_OVFL_STATUS bit 55
      which is used with the Processor Trace (PT) feature.
      Signed-off-by: default avatarStephane Eranian <eranian@google.com>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Cc: <stable@vger.kernel.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
      Cc: Jiri Olsa <jolsa@redhat.com>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Vince Weaver <vincent.weaver@maine.edu>
      Cc: adrian.hunter@intel.com
      Cc: kan.liang@intel.com
      Cc: namhyung@kernel.org
      Link: http://lkml.kernel.org/r/1457034642-21837-2-git-send-email-eranian@google.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
      5690ae28