- 26 Sep, 2017 40 commits
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Anthony Koo authored
Refactor part 1 of degamma/regamma programming. End goal is to have source and output transfer function in which dc can use to decide how to program the degamma and regamma HW. Gamma will be explicitly applied through dc_update_surfaces_for_target. Color module should build the logical curve with all adjustments applied and pass enough information for dc to program HW PWL. Signed-off-by:
Anthony Koo <anthony.koo@amd.com> Reviewed-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Yongqiang Sun authored
Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
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Vitaly Prosyak authored
Fix gamma update logic to avoid crash Signed-off-by:
Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by:
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Zeyu Fan authored
Signed-off-by:
Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by:
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Andrew Wong authored
- Retrieve windowed fullscreen state when getting freesync params. Signed-off-by:
Andrew Wong <andrew.wong1@amd.com> Reviewed-by:
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Andrew Wong authored
- Introduce GRPH_UPDATE_LOCK around programming surface flip. - Remove the now unused graphic surface lock. - Add macros to get and set four registers - both immediate and H Retrace should not be enabled at the same time Signed-off-by:
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Amy Zhang authored
- Gamma correction is not properly copied to the surface after refactor - Make sure gamma correction is copied with correct retain Signed-off-by:
Amy Zhang <Amy.Zhang@amd.com> Reviewed-by:
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Yongqiang Sun authored
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Retain a dc_sink pointer until a new physical pointer arrives in case of new display connected. Signed-off-by:
Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by:
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Tony Cheng authored
- dc_update_surfaces_for_target get called in ISR but apply_clk_constraints allocates memory Signed-off-by:
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Tony Cheng authored
- is_new_pipe_surface should be addressed with pipe idx, not surface idx Signed-off-by:
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Harry Wentland authored
Currently we never use more than 2 surfaces in all use cases. This avoids pushing dc_commit_surfaces_to_target beyond a stacksize of 1024. Signed-off-by:
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Harry Wentland authored
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Harry Wentland authored
Some of those are potential bugs Signed-off-by:
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Arindam Nath authored
Some functions like dm_bandwidth_update are placeholders for future implementations. Right now, they simply print messages like "DM_NOT_IMPL: dm_bandwidth_update". This message even though informational, sometimes can create some confusion for users. Since these functions are only skeletons for future, we simply remove the rather un-unecessary messages from these functions. Signed-off-by:
Arindam Nath <arindam.nath@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Ding Wang authored
Signed-off-by:
Ding Wang <Ding.Wang@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Wenjing Liu authored
Refactor the quantization decision to color module. Add the check if non HDMI, default quantization should be rgb full range. Signed-off-by:
Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by:
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Yongqiang Sun authored
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Tony Cheng authored
- move to new programming style - clean up table to make it obvious what we are programming Signed-off-by:
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Roman Li authored
Signed-off-by:
Roman Li <Roman.Li@amd.com> Reviewed-by:
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Harry Wentland authored
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Harry Wentland authored
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Wenjing Liu authored
The issue causes hue adjustment for rgb limited range color space programmed wrong. Update calculation formula for rgb limited range Signed-off-by:
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Joshua Aberback authored
- we don't yet support 3D timings in DAL3 - somehow a code path was being executed that resulted in HW programming for a 3D timing, which caused 3D displays to show half the desktop in one frame, and the other half of the desktop in the next frame - blocking all 3D timings in timing generator validation until we implement proper 3D timing support Signed-off-by:
Joshua Aberback <Joshua.Aberback@amd.com> Reviewed-by:
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jimqu authored
temp_flip_context is always same as current_context, and the current_context will be freed in dc_commit_targets(), but temp_flip_context will be used in dc_update_surfaces_for_target(). Signed-off-by:
JimQu <Jim.Qu@amd.com> Reviewed-by:
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Zeyu Fan authored
Signed-off-by:
Jordan Lazare <Jordan.Lazare@amd.com> Signed-off-by:
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Zeyu Fan authored
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Alex Deucher authored
Now that the mc_access functions are gone, we no longer need separate structs for all the different dce families in dm. Signed-off-by:
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