Cleanup: iterating a VRegMap skips default entries

The VRegMap doesn't contain explicit "is-set" bits, so I originally
just had iteration return all values.

But all the uses of it ended up needing to have a default value to represent
"not set in map" and then iterating would explicitly check if the value was
that and then would skip it.

Now that behavior is moved into VRegMap itself.

src/analysis/fpc.h

@@ -96,10 +96,10 @@ void computeFixedPoint(typename BBAnalyzer<T>::Map&& initial_map, CFGBlock* init
 
             Map& next = it->second;
             // merge ending->next
-            for (const auto& p : ending) {
-                T& next_elt = next[p.first];
+            for (int vreg = 0; vreg < num_vregs; vreg++) {
+                T& next_elt = next[vreg];
 
-                T new_elt = analyzer.merge(p.second, next_elt);
+                T new_elt = analyzer.merge(ending[vreg], next_elt);
 
                 if (next_elt != new_elt) {
                     next_elt = new_elt;

src/analysis/function_analysis.cpp

@@ -585,9 +585,6 @@ std::unique_ptr<PhiAnalysis> computeRequiredPhis(const OSREntryDescriptor* entry
     }
 
     for (const auto& p : entry_descriptor->args) {
-        if (!p.second)
-            continue;
-
         int vreg = p.first;
         ASSERT(initial_map[vreg] == DefinednessAnalysis::Undefined, "%d %d", vreg, initial_map[vreg]);
         if (entry_descriptor->potentially_undefined[vreg])

src/analysis/type_analysis.cpp

@@ -791,8 +791,6 @@ public:
                 printf("before:\n");
                 TypeMap& starting = starting_types.find(block)->second;
                 for (const auto& p : starting) {
-                    if (!p.second)
-                        continue;
                     auto name = vreg_info.getName(p.first);
                     printf("%s: %s\n", name.c_str(), p.second->debugName().c_str());
                 }
@@ -805,15 +803,11 @@ public:
                 printf("before (after):\n");
                 TypeMap& starting = starting_types.find(block)->second;
                 for (const auto& p : starting) {
-                    if (!p.second)
-                        continue;
                     auto name = vreg_info.getName(p.first);
                     printf("%s: %s\n", name.c_str(), p.second->debugName().c_str());
                 }
                 printf("after:\n");
                 for (const auto& p : ending) {
-                    if (!p.second)
-                        continue;
                     auto name = vreg_info.getName(p.first);
                     printf("%s: %s\n", name.c_str(), p.second->debugName().c_str());
                 }
@@ -843,8 +837,6 @@ public:
 
                 const TypeMap& starting = p.second;
                 for (const auto& p : starting) {
-                    if (!p.second)
-                        continue;
                     auto name = vreg_info.getName(p.first);
                     printf("%s: %s\n", name.c_str(), p.second->debugName().c_str());
                 }

src/codegen/ast_interpreter.cpp

@@ -781,8 +781,7 @@ Box* ASTInterpreter::doOSR(AST_Jump* node) {
 
         // TODO can we just get rid of this?
         for (auto&& p : sorted_symbol_table) {
-            if (p.second)
-                entry->args[p.first] = UNKNOWN;
+            entry->args[p.first] = UNKNOWN;
         }
 
         entry->potentially_undefined = potentially_undefined;
@@ -795,8 +794,7 @@ Box* ASTInterpreter::doOSR(AST_Jump* node) {
     std::vector<Box*> arg_array;
     arg_array.reserve(sorted_symbol_table.numSet() + potentially_undefined.numSet());
     for (auto&& p : sorted_symbol_table) {
-        if (p.second)
-            arg_array.push_back(p.second);
+        arg_array.push_back(p.second);
     }
     for (int vreg : potentially_undefined) {
         bool is_defined = sorted_symbol_table[vreg] != VAL_UNDEFINED;

src/codegen/irgen.cpp

@@ -413,9 +413,6 @@ static void emitBBs(IRGenState* irstate, TypeAnalysis* types, const OSREntryDesc
 
         int arg_num = -1;
         for (const auto& p : entry_descriptor->args) {
-            if (!p.second)
-                continue;
-
             llvm::Value* from_arg;
             arg_num++;
 
@@ -489,8 +486,7 @@ static void emitBBs(IRGenState* irstate, TypeAnalysis* types, const OSREntryDesc
         unbox_emitter->getBuilder()->CreateBr(llvm_entry_blocks[entry_descriptor->backedge->target]);
 
         for (const auto& p : initial_syms) {
-            if (p.second)
-                delete p.second;
+            delete p.second;
         }
     }
 
@@ -627,9 +623,6 @@ static void emitBBs(IRGenState* irstate, TypeAnalysis* types, const OSREntryDesc
                 (*definedness_phis)[vreg] = phi;
             }
             for (const auto& p : entry_descriptor->args) {
-                if (!p.second)
-                    continue;
-
                 int vreg = p.first;
 
                 ConcreteCompilerType* analyzed_type = getTypeAtBlockStart(types, p.first, block);
@@ -756,8 +749,6 @@ static void emitBBs(IRGenState* irstate, TypeAnalysis* types, const OSREntryDesc
 
                 generator->copySymbolsFrom(sym_table);
                 for (auto&& p : *definedness_tables[pred]) {
-                    if (!p.second)
-                        continue;
                     generator->giveDefinednessVar(p.first, p.second);
                 }
                 if (created_new_sym_table)
@@ -796,8 +787,6 @@ static void emitBBs(IRGenState* irstate, TypeAnalysis* types, const OSREntryDesc
                 }
 
                 for (auto&& p : *definedness_tables[pred]) {
-                    if (!p.second)
-                        continue;
                     llvm::PHINode* phi = emitter->getBuilder()->CreatePHI(BOOL->llvmType(), block->predecessors.size());
                     if (VERBOSITY("irgen"))
                         phi->setName("!is_defined_" + vreg_info.getName(p.first).s());
@@ -930,8 +919,6 @@ static void emitBBs(IRGenState* irstate, TypeAnalysis* types, const OSREntryDesc
 
         for (auto it = phis->begin(); it != phis->end(); ++it) {
             llvm::PHINode* llvm_phi = it.second().second;
-            if (!llvm_phi)
-                continue;
 
             handle_phi(llvm_phi, it.first(), it.second().first, false);
         }
@@ -939,8 +926,6 @@ static void emitBBs(IRGenState* irstate, TypeAnalysis* types, const OSREntryDesc
         auto definedness_phis = created_definedness_phis[b];
         for (auto it = definedness_phis->begin(); it != definedness_phis->end(); ++it) {
             llvm::PHINode* llvm_phi = it.second();
-            if (!llvm_phi)
-                continue;
 
             handle_phi(llvm_phi, it.first(), BOOL, true);
         }

src/codegen/irgen/hooks.cpp

@@ -261,8 +261,6 @@ CompiledFunction* compileFunction(FunctionMetadata* f, FunctionSpecialization* s
 
         if (entry_descriptor && VERBOSITY("irgen") >= 2) {
             for (const auto& p : entry_descriptor->args) {
-                if (!p.second)
-                    continue;
                 ss << p.first << ": " << p.second->debugName() << '\n';
             }
         }

src/codegen/irgen/irgenerator.cpp

@@ -2771,8 +2771,6 @@ public:
             typedef std::pair<InternedString, CompilerVariable*> Entry;
             for (auto&& p : symbol_table) {
                 int vreg = p.first;
-                if (!p.second)
-                    continue;
 
                 // We never have to include non compiler generated vars because the user visible variables are stored
                 // inside the vregs array.
@@ -2787,8 +2785,6 @@ public:
             }
 
             for (auto&& p : definedness_vars) {
-                if (!p.second)
-                    continue;
                 if (vregs.isUserVisibleVReg(p.first))
                     continue;
 
@@ -2819,8 +2815,6 @@ public:
         assert(incoming_exc_state.empty());
 
         for (auto&& p : symbol_table) {
-            if (!p.second)
-                continue;
             ASSERT(p.second->getType()->isUsable(), "%d", p.first);
         }
 
@@ -2847,8 +2841,6 @@ public:
         // We have one successor, but they have more than one predecessor.
         // We're going to sort out which symbols need to go in phi_st and which belong inst.
         for (auto&& p : *st) {
-            if (!p.second)
-                continue;
             if (/*allowableFakeEndingSymbol(it->first)
                 ||*/ irstate->getPhis()->isRequiredAfter(p.first, myblock)) {
                 ConcreteCompilerType* ending_type = types->getTypeAtBlockEnd(p.first, myblock);
@@ -2892,8 +2884,6 @@ public:
         assert(st);
         DupCache cache;
         for (SymbolTable::iterator it = st->begin(); it != st->end(); ++it) {
-            if (!it.second())
-                continue;
             // printf("Copying in %s, a %s\n", it->first.c_str(), it->second->getType()->debugName().c_str());
             symbol_table[it.first()] = it.second()->dup(cache);
             assert(symbol_table[it.first()]->getType()->isUsable());

src/core/cfg.h

@@ -257,6 +257,14 @@ public:
     iterator end() const { return iterator(*this, this->v.size()); }
 };
 
+// VRegMap: A compact way of representing a value per vreg.
+//
+// One thing to note is that every vreg will get a value by default
+// (the default value of T()), and fetching an unset vreg will return
+// that value.
+//
+// Iterating will skip over these values though.  If you want to see them,
+// you can iterate from 0 to numVregs().
 template <typename T> class VRegMap {
 private:
     // TODO: switch just to a T*?
@@ -300,7 +308,9 @@ public:
 
         // TODO: make this skip unset values?
         iterator& operator++() {
-            i++;
+            do {
+                i++;
+            } while (i < map.numVregs() && map[i] == T());
             return *this;
         }
 
@@ -314,7 +324,11 @@ public:
 
     int numVregs() const { return v.size(); }
 
-    iterator begin() const { return iterator(*this, 0); }
+    iterator begin() const {
+        iterator it = iterator(*this, -1);
+        ++it;
+        return it;
+    }
 
     iterator end() const { return iterator(*this, this->v.size()); }
 };