rcw: add SD1 mode 4 rcw configuration

Add support for mode 4, which allows connectivity with 1000base-X and
SGMII to be used with the SFP and QSFP slots in conjunction with the
kernel's PCS support.
Signed-off-by: Russell King <rmk@armlinux.org.uk>

patches/mc-utils/0004-lx2160acex7-add-backplane-support.patch

+From c2badc0eaa4a7d63c8d074351cb268d13bef3b64 Mon Sep 17 00:00:00 2001
+From: Russell King <rmk+kernel@armlinux.org.uk>
+Date: Fri, 8 Jan 2021 16:32:49 +0000
+Subject: [PATCH] lx2160acex7: add backplane support
+
+Add a DPC file to mark the SFP/QSFP for backplane mode, which allows
+the use of the PCS by the kernel.
+
+Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
+---
+ config/lx2160a/CEX7/dpc-backplane.dts | 98 +++++++++++++++++++++++++++
+ 1 file changed, 98 insertions(+)
+ create mode 100644 config/lx2160a/CEX7/dpc-backplane.dts
+
+diff --git a/config/lx2160a/CEX7/dpc-backplane.dts b/config/lx2160a/CEX7/dpc-backplane.dts
+new file mode 100644
+index 000000000000..06b5f19a90c3
+--- /dev/null
++++ b/config/lx2160a/CEX7/dpc-backplane.dts
+@@ -0,0 +1,98 @@
++/*
++* Copyright 2018 NXP
++*
++* Redistribution and use in source and binary forms, with or without
++* modification, are permitted provided that the following conditions are met:
++*   * Redistributions of source code must retain the above copyright
++*     notice, this list of conditions and the following disclaimer.
++*   * Redistributions in binary form must reproduce the above copyright
++*     notice, this list of conditions and the following disclaimer in the
++*     documentation and/or other materials provided with the distribution.
++*   * Neither the name of the above-listed copyright holders nor the
++*     names of any contributors may be used to endorse or promote products
++*     derived from this software without specific prior written permission.
++*
++* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
++* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
++* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
++* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
++* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
++* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
++* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
++* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
++* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
++* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
++* POSSIBILITY OF SUCH DAMAGE.
++*/
++
++/*
++* This DPC showcases one Linux configuration for lx2160a boards.
++*/
++
++/dts-v1/;
++
++/ {
++	resources {
++		icid_pools {
++			icid_pool@1 {
++				num = <0x64>;
++				base_icid = <0x0>;
++			};
++		};
++	};
++
++	mc_general {
++		log {
++			mode = "LOG_MODE_ON";
++			level = "LOG_LEVEL_WARNING";
++		};
++
++		console {
++			mode = "CONSOLE_MODE_OFF";
++			uart_id = <0x4>;
++			level = "LOG_LEVEL_WARNING";
++		};
++	};
++
++	controllers {
++		qbman {
++			/* Transform this number of 8-WQ channels into four times
++			 * as many 2-WQ channels. This allows the creation of a
++			 * larger number of DPCONs.
++			 */
++			wq_ch_conversion = <32>;
++		};
++	};
++
++	board_info {
++		ports {
++			mac@3 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@4 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@5 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@6 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@7 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@8 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@9 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@10 {
++				link_type = "MAC_LINK_TYPE_BACKPLANE";
++			};
++			mac@17 {
++				link_type = "MAC_LINK_TYPE_PHY";
++			};
++		};
++	};
++};
+-- 
+2.20.1
+

patches/rcw-LSDK-20.04/9999-lx2160acex7-add-SD1-mode-4-serdes-configuration.patch

+From 2ae3b51f85375e32b818cb64fbe42750d1d6254f Mon Sep 17 00:00:00 2001
+From: Russell King <rmk@armlinux.org.uk>
+Date: Thu, 23 Jan 2020 15:53:30 +0000
+Subject: [PATCH] lx2160acex7: add SD1 mode 4 serdes configuration
+
+Add mode 4 serdes configuration for SGMII and 1000BASE-X on serdes 1.
+
+Signed-off-by: Russell King <rmk@armlinux.org.uk>
+---
+ lx2160acex7/configs/lx2160a_SD1_4.rcwi | 4 ++++
+ 1 file changed, 4 insertions(+)
+ create mode 100644 lx2160acex7/configs/lx2160a_SD1_4.rcwi
+
+diff --git a/lx2160acex7/configs/lx2160a_SD1_4.rcwi b/lx2160acex7/configs/lx2160a_SD1_4.rcwi
+new file mode 100644
+index 000000000000..ec8ca959b59b
+--- /dev/null
++++ b/lx2160acex7/configs/lx2160a_SD1_4.rcwi
+@@ -0,0 +1,4 @@
++SRDS_PRTCL_S1=4
++/* SRDS_INTRA_REF_CLK_S1 = 1 PLLF used for PLLS */
++SRDS_PLL_REF_CLK_SEL_S1=0
++SRDS_PLL_PD_PLL1=1
+-- 
+2.20.1
+

runme.sh

@@ -41,6 +41,10 @@ case "${SERDES}" in
 		DPC=dpc-8_x_usxgmii.dtb
 		DPL=dpl-eth.8x10g.19.dtb
 	;;
+	4_*)
+		DPC=dpc-backplane.dtb
+		DPL=dpl-eth.8x10g.19.dtb
+	;;
 	8_*)
 		DPC=dpc-8_x_usxgmii.dtb
 		DPL=dpl-eth.8x10g.19.dtb