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Commit 6fa3d382 authored by Josua Mayer's avatar Josua Mayer Committed by Rabeeh Khoury
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enable runtime switching of dpmac interface speeds from 1 to 10Gbps 

Signed-off-by: default avatarJosua Mayer <josua@solid-run.com>
parent 93536f42
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configs/linux/lx2k_additions.config
View file @ 6fa3d382
......@@ -43,3 +43,6 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_USER_API_RNG=y
CONFIG_CRYPTO_USER_API_AEAD=y
CONFIG_SFP=y
CONFIG_PHY_FSL_SERDES_28G=y
CONFIG_MARVELL_PHY=y
CONFIG_NAMESPACES=y
patches/linux-LSDK-21.08/0006-net-phy-add-phy_interface_t-bitmap-support.patch 0 → 100644
View file @ 6fa3d382
From 2a75420f57b18b252aa43cd95029baed55a0e7f4 Mon Sep 17 00:00:00 2001
From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
Date: Tue, 26 Oct 2021 11:06:01 +0100
Subject: [PATCH 06/13] net: phy: add phy_interface_t bitmap support
Add support for a bitmap for phy interface modes, which includes:
- a macro to declare the interface bitmap
- an inline helper to zero the interface bitmap
- an inline helper to detect an empty interface bitmap
- inline helpers to do a bitwise AND and OR operations on two interface
bitmaps
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
include/linux/phy.h | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 8559a829a822..cb54401cdfb4 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -148,6 +148,40 @@ typedef enum {
PHY_INTERFACE_MODE_MAX,
} phy_interface_t;
+/* PHY interface mode bitmap handling */
+#define DECLARE_PHY_INTERFACE_MASK(name) \
+ DECLARE_BITMAP(name, PHY_INTERFACE_MODE_MAX)
+
+static inline void phy_interface_zero(unsigned long *intf)
+{
+ bitmap_zero(intf, PHY_INTERFACE_MODE_MAX);
+}
+
+static inline bool phy_interface_empty(const unsigned long *intf)
+{
+ return bitmap_empty(intf, PHY_INTERFACE_MODE_MAX);
+}
+
+static inline void phy_interface_and(unsigned long *dst, const unsigned long *a,
+ const unsigned long *b)
+{
+ bitmap_and(dst, a, b, PHY_INTERFACE_MODE_MAX);
+}
+
+static inline void phy_interface_or(unsigned long *dst, const unsigned long *a,
+ const unsigned long *b)
+{
+ bitmap_or(dst, a, b, PHY_INTERFACE_MODE_MAX);
+}
+
+static inline void phy_interface_set_rgmii(unsigned long *intf)
+{
+ __set_bit(PHY_INTERFACE_MODE_RGMII, intf);
+ __set_bit(PHY_INTERFACE_MODE_RGMII_ID, intf);
+ __set_bit(PHY_INTERFACE_MODE_RGMII_RXID, intf);
+ __set_bit(PHY_INTERFACE_MODE_RGMII_TXID, intf);
+}
+
/*
* phy_supported_speeds - return all speeds currently supported by a PHY device
*/
--
2.34.1
patches/linux-LSDK-21.08/0007-dpaa2-eth-unregister-the-netdev-before-disconnecting.patch 0 → 100644
View file @ 6fa3d382
From 2ffca903d11b80fc624a09f3556a68b4f1cfd173 Mon Sep 17 00:00:00 2001
From: Robert-Ionut Alexa <robert-ionut.alexa@nxp.com>
Date: Thu, 1 Jul 2021 14:49:08 +0300
Subject: [PATCH 07/13] dpaa2-eth: unregister the netdev before disconnecting
from the PHY
The netdev should be unregistered before we are disconnecting from the MAC/PHY
so that the dev_close callback is called and the PHY and the phylink workqueues
are actually stopped before we are disconnecting and destroying the phylink instance.
Fixes: 719479230893 ("dpaa2-eth: add MAC/PHY support through phylink")
Signed-off-by: Robert-Ionut Alexa <robert-ionut.alexa@nxp.com>
---
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
index 816256eaeac7..756041df9d08 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
@@ -4535,9 +4535,8 @@ static int dpaa2_eth_remove(struct fsl_mc_device *ls_dev)
#ifdef CONFIG_DEBUG_FS
dpaa2_dbg_remove(priv);
#endif
- dpaa2_eth_disconnect_mac(priv);
-
unregister_netdev(net_dev);
+ dpaa2_eth_disconnect_mac(priv);
dpaa2_eth_dl_port_del(priv);
dpaa2_eth_dl_traps_unregister(priv);
--
2.34.1
patches/linux-LSDK-21.08/0008-arm64-dts-lx2160a-describe-the-SerDes-block-1.patch 0 → 100644
View file @ 6fa3d382
From b09da32305a0a5e416cf1bbcb370b6bd6ebffbac Mon Sep 17 00:00:00 2001
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Wed, 3 Nov 2021 17:47:31 +0200
Subject: [PATCH 08/13] arm64: dts: lx2160a: describe the SerDes block #1
Describe the SerDes block #1 using the generic phys infrastructure. This
way, the ethernet nodes can each reference their serdes lanes
individually using the 'phys' dts property.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
.../freescale/fsl-lx2160a-clearfog-itx.dtsi | 4 ++
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 41 +++++++++++++++++++
2 files changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
index 17f8e733972a..14a6334adff2 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-clearfog-itx.dtsi
@@ -63,21 +63,25 @@ sfp3: sfp-3 {
&dpmac7 {
sfp = <&sfp0>;
managed = "in-band-status";
+ phys = <&serdes1_lane_d>;
};
&dpmac8 {
sfp = <&sfp1>;
managed = "in-band-status";
+ phys = <&serdes1_lane_c>;
};
&dpmac9 {
sfp = <&sfp2>;
managed = "in-band-status";
+ phys = <&serdes1_lane_b>;
};
&dpmac10 {
sfp = <&sfp3>;
managed = "in-band-status";
+ phys = <&serdes1_lane_a>;
};
&emdio2 {
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index cff0699d7992..c493b889c2a8 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -613,6 +613,47 @@ soc {
ranges;
dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
+ serdes_1: serdes_phy@1ea0000 {
+ compatible = "fsl,serdes-28g";
+ reg = <0x00 0x1ea0000 0x0 0x1e30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #phy-cells = <1>;
+
+ serdes1_lane_a: phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+ serdes1_lane_b: phy@1 {
+ reg = <1>;
+ #phy-cells = <0>;
+ };
+ serdes1_lane_c: phy@2 {
+ reg = <2>;
+ #phy-cells = <0>;
+ };
+ serdes1_lane_d: phy@3 {
+ reg = <3>;
+ #phy-cells = <0>;
+ };
+ serdes1_lane_e: phy@4 {
+ reg = <4>;
+ #phy-cells = <0>;
+ };
+ serdes1_lane_f: phy@5 {
+ reg = <5>;
+ #phy-cells = <0>;
+ };
+ serdes1_lane_g: phy@6 {
+ reg = <6>;
+ #phy-cells = <0>;
+ };
+ serdes1_lane_h: phy@7 {
+ reg = <7>;
+ #phy-cells = <0>;
+ };
+ };
+
crypto: crypto@8000000 {
compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
fsl,sec-era = <10>;
--
2.34.1
patches/linux-LSDK-21.08/0010-dpaa2-eth-configure-the-SerDes-phy-on-a-protocol-cha.patch 0 → 100644
View file @ 6fa3d382
From 08d2275cb55bf41e48d6ee10309229965594f37f Mon Sep 17 00:00:00 2001
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Wed, 10 Nov 2021 17:06:45 +0200
Subject: [PATCH 10/13] dpaa2-eth: configure the SerDes phy on a protocol
change
This patch integrates the dpaa2-eth driver with the generic PHY
infrastructure in order to search, find and reconfigure the SerDes lanes
in case of a protocol change.
The phylink's .mac_prepare() and .mac_finish() callbacks are implemented
just so that the SerDes lane can be stopped and then powered back on in
case reconfiguration is necessary.
On the .mac_config() callback, the phy_set_mode_ext() API is called so
that the SerDes28G PHY driver can change the lane's configuration.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
.../net/ethernet/freescale/dpaa2/dpaa2-mac.c | 74 ++++++++++---------
.../net/ethernet/freescale/dpaa2/dpaa2-mac.h | 2 +
2 files changed, 42 insertions(+), 34 deletions(-)
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
index a5c76ff33bed..b174b59ea45b 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -4,6 +4,7 @@
#include <linux/fsl/mc.h>
#include <linux/msi.h>
#include <linux/acpi.h>
+#include <linux/phy/phy.h>
#include <linux/property.h>
#include "dpaa2-eth.h"
@@ -106,46 +107,12 @@ static int dpaa2_mac_get_if_mode(struct fwnode_handle *dpmac_node,
return err;
}
-static bool dpaa2_mac_phy_mode_mismatch(struct dpaa2_mac *mac,
- phy_interface_t interface)
-{
- switch (interface) {
- /* We can switch between SGMII and 1000BASE-X at runtime with
- * pcs-lynx
- */
- case PHY_INTERFACE_MODE_SGMII:
- case PHY_INTERFACE_MODE_1000BASEX:
- if (mac->pcs &&
- (mac->if_mode == PHY_INTERFACE_MODE_SGMII ||
- mac->if_mode == PHY_INTERFACE_MODE_1000BASEX))
- return false;
- return interface != mac->if_mode;
-
- case PHY_INTERFACE_MODE_10GBASER:
- case PHY_INTERFACE_MODE_USXGMII:
- case PHY_INTERFACE_MODE_QSGMII:
- case PHY_INTERFACE_MODE_RGMII:
- case PHY_INTERFACE_MODE_RGMII_ID:
- case PHY_INTERFACE_MODE_RGMII_RXID:
- case PHY_INTERFACE_MODE_RGMII_TXID:
- return (interface != mac->if_mode);
- default:
- return true;
- }
-}
-
static void dpaa2_mac_validate(struct phylink_config *config,
unsigned long *supported,
struct phylink_link_state *state)
{
- struct dpaa2_mac *mac = phylink_to_dpaa2_mac(config);
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
- if (state->interface != PHY_INTERFACE_MODE_NA &&
- dpaa2_mac_phy_mode_mismatch(mac, state->interface)) {
- goto empty_set;
- }
-
phylink_set_port_modes(mask);
phylink_set(mask, Autoneg);
phylink_set(mask, Pause);
@@ -210,6 +177,10 @@ static void dpaa2_mac_config(struct phylink_config *config, unsigned int mode,
if (err)
netdev_err(mac->net_dev, "%s: dpmac_set_link_state() = %d\n",
__func__, err);
+
+ err = phy_set_mode_ext(mac->serdes_phy, PHY_MODE_ETHERNET, state->interface);
+ if (err)
+ netdev_err(mac->net_dev, "phy_set_mode_ext() = %d\n", err);
}
static void dpaa2_mac_link_up(struct phylink_config *config,
@@ -263,11 +234,37 @@ static void dpaa2_mac_link_down(struct phylink_config *config,
netdev_err(mac->net_dev, "dpmac_set_link_state() = %d\n", err);
}
+static int dpaa2_mac_prepare(struct phylink_config *config, unsigned int mode,
+ phy_interface_t interface)
+{
+ struct dpaa2_mac *mac = phylink_to_dpaa2_mac(config);
+
+ dpaa2_mac_link_down(config, mode, interface);
+
+ if (mac->serdes_phy)
+ phy_power_off(mac->serdes_phy);
+
+ return 0;
+}
+
+static int dpaa2_mac_finish(struct phylink_config *config, unsigned int mode,
+ phy_interface_t interface)
+{
+ struct dpaa2_mac *mac = phylink_to_dpaa2_mac(config);
+
+ if (mac->serdes_phy)
+ phy_power_on(mac->serdes_phy);
+
+ return 0;
+}
+
static const struct phylink_mac_ops dpaa2_mac_phylink_ops = {
.validate = dpaa2_mac_validate,
.mac_config = dpaa2_mac_config,
.mac_link_up = dpaa2_mac_link_up,
.mac_link_down = dpaa2_mac_link_down,
+ .mac_prepare = dpaa2_mac_prepare,
+ .mac_finish = dpaa2_mac_finish,
};
static int dpaa2_pcs_create(struct dpaa2_mac *mac,
@@ -321,6 +318,7 @@ int dpaa2_mac_connect(struct dpaa2_mac *mac)
{
struct net_device *net_dev = mac->net_dev;
struct fwnode_handle *dpmac_node;
+ struct phy *serdes_phy = NULL;
struct phylink *phylink;
int err;
@@ -337,6 +335,14 @@ int dpaa2_mac_connect(struct dpaa2_mac *mac)
return -EINVAL;
mac->if_mode = err;
+ if (!phy_interface_mode_is_rgmii(mac->if_mode) &&
+ is_of_node(dpmac_node)) {
+ serdes_phy = of_phy_get(to_of_node(dpmac_node), NULL);
+ if (IS_ERR(serdes_phy))
+ return -EPROBE_DEFER;
+ }
+ mac->serdes_phy = serdes_phy;
+
/* The MAC does not have the capability to add RGMII delays so
* error out if the interface mode requests them and there is no PHY
* to act upon them
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h
index b337f9da639b..a0fdb43185ea 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h
@@ -26,6 +26,8 @@ struct dpaa2_mac {
enum dpmac_link_type if_link_type;
struct lynx_pcs *pcs;
struct fwnode_handle *fw_node;
+
+ struct phy *serdes_phy;
};
bool dpaa2_mac_is_type_fixed(struct fsl_mc_device *dpmac_dev,
--
2.34.1
patches/linux-LSDK-21.08/0011-dpaa2-eth-configure-the-MAC-XIF_MODE-register-on-pro.patch 0 → 100644
View file @ 6fa3d382
From 706968646b36732de79aae3354a858bf387edf57 Mon Sep 17 00:00:00 2001
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Wed, 10 Nov 2021 17:09:06 +0200
Subject: [PATCH 11/13] dpaa2-eth: configure the MAC XIF_MODE register on
protocol change
This patch ioremaps the MEMAC XIF_MODE register in order to change the
protocol (IFMODE field) from XLGMII (10G/25G mode) to GMII mode in case
of a major reconfiguration.
This is just a hack in the dpaa2-eth driver until we have support in the
MC firmware.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
.../net/ethernet/freescale/dpaa2/dpaa2-mac.c | 26 +++++++++++++++++++
.../net/ethernet/freescale/dpaa2/dpaa2-mac.h | 1 +
2 files changed, 27 insertions(+)
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
index b174b59ea45b..6a5f754c8c61 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -165,6 +165,7 @@ static void dpaa2_mac_config(struct phylink_config *config, unsigned int mode,
{
struct dpaa2_mac *mac = phylink_to_dpaa2_mac(config);
struct dpmac_link_state *dpmac_state = &mac->state;
+ u32 if_mode, orig, tmp;
int err;
if (state->an_enabled)
@@ -178,6 +179,24 @@ static void dpaa2_mac_config(struct phylink_config *config, unsigned int mode,
netdev_err(mac->net_dev, "%s: dpmac_set_link_state() = %d\n",
__func__, err);
+ switch (state->interface) {
+ case PHY_INTERFACE_MODE_10GBASER:
+ case PHY_INTERFACE_MODE_USXGMII:
+ if_mode = 0x1;
+ break;
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_1000BASEX:
+ if_mode = 0x3;
+ break;
+ default:
+ break;
+ }
+
+ orig = ioread32(mac->if_mode_reg);
+ tmp = orig & ~0x3;
+ tmp |= if_mode;
+ iowrite32(tmp, mac->if_mode_reg);
+
err = phy_set_mode_ext(mac->serdes_phy, PHY_MODE_ETHERNET, state->interface);
if (err)
netdev_err(mac->net_dev, "phy_set_mode_ext() = %d\n", err);
@@ -412,6 +431,7 @@ int dpaa2_mac_open(struct dpaa2_mac *mac)
{
struct fsl_mc_device *dpmac_dev = mac->mc_dev;
struct net_device *net_dev = mac->net_dev;
+ unsigned long if_mode_addr;
int err;
err = dpmac_open(mac->mc_io, 0, dpmac_dev->obj_desc.id,
@@ -434,6 +454,12 @@ int dpaa2_mac_open(struct dpaa2_mac *mac)
mac->fw_node = dpaa2_mac_get_node(&mac->mc_dev->dev, mac->attr.id);
net_dev->dev.of_node = to_of_node(mac->fw_node);
+ if_mode_addr = 0x8c07080 + 0x4000 * (dpmac_dev->obj_desc.id - 1);
+ mac->if_mode_reg = ioremap(if_mode_addr, 4);
+ if (!mac->if_mode_reg) {
+ netdev_err(net_dev, "ioremap on if_mode failed\n");
+ }
+
return 0;
err_close_dpmac:
diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h
index a0fdb43185ea..5f1a500b503a 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.h
@@ -28,6 +28,7 @@ struct dpaa2_mac {
struct fwnode_handle *fw_node;
struct phy *serdes_phy;
+ void __iomem *if_mode_reg;
};
bool dpaa2_mac_is_type_fixed(struct fsl_mc_device *dpmac_dev,
--
2.34.1
patches/mc-utils/0006-lx2160acex7-upgrade-network-ports-from-fixed-link-to.patch 0 → 100644
View file @ 6fa3d382
From ae5d80dc0f1b92dface59c9e14f4627ca8e03cfc Mon Sep 17 00:00:00 2001
From: Josua Mayer <josua@solid-run.com>
Date: Thu, 31 Mar 2022 10:57:54 +0300
Subject: [PATCH 6/6] lx2160acex7: upgrade network ports from fixed link to phy
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
config/lx2160a/CEX7/dpc-8_x_usxgmii.dts | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/config/lx2160a/CEX7/dpc-8_x_usxgmii.dts b/config/lx2160a/CEX7/dpc-8_x_usxgmii.dts
index 44e22bb..7b0e576 100644
--- a/config/lx2160a/CEX7/dpc-8_x_usxgmii.dts
+++ b/config/lx2160a/CEX7/dpc-8_x_usxgmii.dts
@@ -72,28 +72,28 @@
board_info {
ports {
mac@3 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@4 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@5 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@6 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@7 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@8 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@9 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@10 {
- link_type = "MAC_LINK_TYPE_FIXED";
+ link_type = "MAC_LINK_TYPE_PHY";
};
mac@17 {
link_type = "MAC_LINK_TYPE_PHY";
--
2.34.1
patches/rcw-LSDK-21.08/0017-lx2160acex7-mode-8-use-external-PLLs.patch 0 → 100644
View file @ 6fa3d382
From 89be982a78fd1767a7c9f36147df91969293387d Mon Sep 17 00:00:00 2001
From: Josua Mayer <josua@solid-run.com>
Date: Sun, 27 Mar 2022 13:37:03 +0300
Subject: [PATCH 17/18] lx2160acex7: mode 8: use external PLLs
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
lx2160acex7/configs/lx2160a_SD1_8.rcwi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lx2160acex7/configs/lx2160a_SD1_8.rcwi b/lx2160acex7/configs/lx2160a_SD1_8.rcwi
index abd6dfd..0dab1c4 100644
--- a/lx2160acex7/configs/lx2160a_SD1_8.rcwi
+++ b/lx2160acex7/configs/lx2160a_SD1_8.rcwi
@@ -1,4 +1,4 @@
SRDS_PRTCL_S1=8 /* should be 8 */
-SRDS_INTRA_REF_CLK_S1 = 1 /* PLLF used for PLLS */
+/*SRDS_INTRA_REF_CLK_S1 = 1*/ /* PLLF used for PLLS */
SRDS_PLL_REF_CLK_SEL_S1=2
-SRDS_PLL_PD_PLL1=1
+/*SRDS_PLL_PD_PLL1=1*/
--
2.34.1
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